Data Sheet

ADGS1208/ADGS1209

Rev. 0 | Page 31 of 33

BURST ENABLE REGISTER

Address: 0x05, Reset: 0x00, Name: BURST_EN

The burst enable register allows the user to enable or disable burst mode. When enabled, the user can send multiple consecutive SPI

commands without deasserting CS.

Table 19. Bit Descriptions for BURST_EN

Bits

Bit Name

Settings

Description

Default

Access

[7:1]

Reserved

These bits are reserved. Set these bits to 0.

0x0

R

0

BURST_MODE_EN

Burst mode enable bit.

0x0

R/W

0

Disabled.

1

Enabled.

ROUND ROBIN ENABLE REGISTER

Address: 0x06, Reset: 0x00, Name: ROUND_ROBIN_EN

The round robin register allows the user to enable or disable round robin mode. When enabled, the user can cycle through the channels

enabled in the round robin configuration register by presenting the relevant edge on the CNV pin.

Table 20. Bit Descriptions for ROUND_ROBIN_EN

Bits

Bit Name

Settings

Description

Default

Access

[7:1]

Reserved

These bits are reserved. Set these bits to 0.

0x0

R

0

ROUND_ROBIN_EN

Round robin mode enable bit.

0x0

R/W

0

Disabled.

1

Enabled.

ROUND ROBIN CHANNEL CONFIGURATION REGISTER

Address: 0x07, Reset: 0xFF (ADGS1208), 0x0F (ADGS1209), Name: RROBIN_CHANNEL_CONFIG

The round robin channel configuration register controls which channels are included a cycle during round robin mode. During round

robin mode, the channels are cycled through in ascending order.

Table 21. Bit Descriptions for RROBIN_CHANNEL_CONFIG (ADGS1208)

Bits

Bit Name

Settings

Description

Default

Access

7

S8_EN

Enable bit for S8.

0x1

R/W

0

S8 disabled during round robin mode.

1

S8 enabled during round robin mode.

6

S7_EN

Enable bit for S7.

0x1

R/W

0

S7 disabled during round robin mode.

1

S7 enabled during round robin mode.

5

S6_EN

Enable bit for S6.

0x1

R/W

0

S6 disabled during round robin mode.

1

S6 enabled during round robin mode.

4

S5_EN

Enable bit for S5.

0x1

R/W

0

S5 disabled during round robin mode.

1

S5 enabled during round robin mode.

3

S4_EN

Enable bit for S4.

0x1

R/W

0

S4 disabled during round robin mode.

1

S4 enabled during round robin mode.

2

S3_EN

Enable bit for S3.

0x1

R/W

0

S3 disabled during round robin mode.

1

S3 enabled during round robin mode.