AIS2IH datasheet(25/63 Pages) STMICROELECTRONICS

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Digital interfaces

The registers embedded inside the AIS2IH may be accessed through both the I²C and SPI serial interfaces. The

latter may be SW configured to operate either in 3-wire or 4-wire interface mode.

The serial interfaces are mapped to the same pins. To select/exploit the I²C interface, the CS line must be tied

high (i.e. connected to Vdd_IO).

Table 13. Serial interface pin description

Pin name

Pin description

SPI enable

I²C/SPI mode selection

(1: SPI idle mode / I²C communication enabled;

0: SPI communication mode / I²C disabled)

SCL

SPC

I²C serial clock (SCL)

SPI serial port clock (SPC)

SDA

SDI

SDO

I²C serial data (SDA)

SPI serial data input (SDI)

3-wire interface serial data output (SDO)

SA0

SDO

I²C address selection (SA0)

SPI serial data output (SDO)

6.1

I²C serial interface

The AIS2IH I²C is a bus slave. The I²C is employed to write data into registers whose content can also be read

back.

The relevant I²C terminology is given in the table below.

Table 14. I²C terminology

Term

Description

Transmitter

The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals and terminates a transfer

Slave

The device addressed by the master

There are two signals associated with the I²C bus: the serial clock line (SCL) and the Serial DAta line (SDA). The

latter is a bidirectional line used for sending and receiving the data to/from the interface. Both the lines must be

connected to Vdd_IO through an external pull-up resistor. When the bus is free, both the lines are high.

The I²C interface is compliant with fast mode (400 kHz) I²C standards as well as with normal mode.

In order to disable the I²C block, CTRL2 (21h) (I2C_DISABLE) = 1 must be set.

AIS2IH

Digital interfaces

DS12421 - Rev 4

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