ACE24AC08C datasheet(5/20 Pages) ACE

5 / 20 page

ACE24AC08C

Two-wire Serial EEPROM

VER 1.1

Figure 1: Timing diagram for start and stop conditions

Figure 2: Timing diagram for output acknowledge

Device Addressing

The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to

invoke valid read or write command. The first four most significant bits of the device address must be

1010, which is common to all serial EEPROM devices. The next bit is device address bit. This device

address bit (5th) is to match with the external chip select/address pin states. If a match is made, the

EEPROM device outputs an ACKNOWLEDGE signal after the 8th read/write bit, otherwise the chip will go

into STANDBY mode. The last or 8th bit is a read/write command bit. If the 8th bit is at VIH then the chip

goes into read mode. If a “0” is detected, the device enters programming mode.

ACE24AC08C uses only A2 device address bit. Only two ACE24AC08C devices can be wired-OR on the

same 2-wire bus. Their corresponding chip select address pin A2 must be hard-wired and coded from 0 to

ACE24AC08C Datasheet(PDF) 5 Page - ACE Technology Co., LTD.