UPD16682AP datasheet(29/55 Pages) NEC

29 / 55 page

Data Sheet S14402EJ1V0DS

µµµµPD16682A

12.3 Page Address Set

This command specifies the page address corresponding to the row address when accessing the display data RAM

from the CPU side, as was shown in Figure 6–2. The specified bit in display data RAM can be accessed by selecting

the corresponding page address and column address. If the page address is changed, the display mode does not

change.

For details, see 6.2 Page Address Circuit.

E, /RD

R,/W, /WR

Page

Address

0000

0001

0010

↓↓

0111

1000

12.4 Column Address Set

This command specifies the column address in display data RAM, as was shown in Figure 6–2. The column

address is set in a (basically continuous) series of two specifications, one for the high-order four bits and another for

the low-order four bits. The column address is automatically incremented (+1) each time the display data RAM is

accessed, so the CPU is able to continuously read or write display data. Incrementation of the column address stops

at 83H. At that point the page address can no longer be continuously modified. For details, see 6.3 Column

Address Circuit.

E, /RD

R,/W, /WR

A7A6A5

A3A2A1

Column Address

0000

↓↓

0000

130

0000

131

UPD16682AP Datasheet(PDF) 29 Page - NEC