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UPD16682AP Datasheet(PDF) 13 Page - NEC

Part # UPD16682AP
Description  1/65 DUTY LCD CONTROLLER/DRIVER WITH ON-CHIP RAM
PDF  55 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD16682AP Datasheet(HTML) 13 Page - NEC

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Data Sheet S14402EJ1V0DS
13
µµµµPD16682A
5. DESCRIPTION OF FUNCTIONS
5.1 CPU Interface
5.1.1 Select interface type
The
µ PD16682A transfers data either via an 8-bit bidirectional data bus (D7 to D0) or via a serial data input (SI).
The P,/S pin can be set to either high or low levels to select 8-bit parallel data input or serial data input, as shown
in the table below.
P,/S
/CS1
CS2
A0
/RD
/WR
C86
D7
D6
D5 - D0
H: Parallel input
/CS1
CS2
A0
/RD
/WR
C86
D7
D6
D5 -D0
L: Serial input
/CS1
CS2
A0
Note 1
Note 1
Note1
SI
SCL
Note2
Notes 1. Fix this pin as either H or L.
2. High impedance
5.1.2 Parallel interface
If the parallel interface has been selected (P,/S = H), setting the C86 pin either high or low determines whether to
connect directly to the 80 series CPU or the 68 series CPU, as shown in the table below.
P,/S
/CS1
CS2
A0
/RD
D7 - D0
H: 68 series CPU bus
/CS1
CS2
A0
E
D7 - D0
L: 80 series CPU bus
/CS1
CS2
A0
/RD
D7 - D0
The data bus signal can be identified according to the combination of A0, /RD(E), and /WR (R,/W) signals, as
shown in the table below.
Common
68 Series
80 Series
Function
A0
R,/W
/RD
/WR
H
H
L
H
Read display data
H
L
H
L
Write display data
L
H
L
H
Read status
L
L
H
L
Write control data (command)



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