M030GD2AE datasheet(38/118 Pages) NUVOTON

38 / 118 page

M030G/M031G Series

May 31, 2021

Page 38 of 118

Rev 1.00

Low Voltage

Reset

Power-on

Reset

Brown-out

Reset

Reset Pulse Width

~3.2ms

WDT/WWDT

Reset

~50k ohm

@3.3v

nRESET

VDD

AVDD

CHIP Reset

CHIPRST(SYS_IPRST0[0])

CPU Reset

CPURST(SYS_IPRST0[1])

CPU Lockup

Reset

MCU Reset

SYSRSTREQ(AIRCR[2])

LVREN(SYS_BODCTL[7])

BODRSTEN(SYS_BODCTL[3])

POROFF(SYS_PORCTL[15:0])

Reset Pulse Width

64 WDT clocks

Reset Pulse Width

2 system clocks

Glitch Filter

33 us

NRESET Reset

Hardware Reset Sources

Software Reset Sources

Reset Pulse Width

~3.2ms

POR Reset

Reset Pulse Width

~3.2ms

LVR Reset

BOD Reset

WDT Reset

Lockup Reset

Reset Pulse Width

2 system clocks

Reset Pulse Width

2 system clocks

Reset Pulse Width

2 system clocks

CHIP Reset

MCU Reset

CPU Reset

Figure 6.2-1 System Reset Sources

There are a total of 9 reset sources in the NuMicro® family. In general, CPU reset is used to reset

Cortex® -M0 only; the other reset sources will reset Cortex® -M0 and all peripherals. However, there are

some registers with particularly different reset sources. Table 6.2-1 lists these differences.

Reset Sources

POR

NRESET

WDT

LVR

BOD

Lockup

CHIP

MCU

CPU

SYS_RSTSTS

Bit 0 = 1

Bit 1 = 1

Bit 2 = 1

Bit 3 = 1

Bit 4 = 1

Bit 8 = 1

Bit 0 = 1

Bit 5 = 1

Bit 7 = 1

CHIPRST

(SYS_IPRST0[0])

0x0

BODEN

(SYS_BODCTL[0])

0x0

0x1

BODVL

(SYS_BODCTL[16])

0x0

BODRSTEN

(SYS_BODCTL[3])

0x1

WDTCKEN

(CLK_APBCLK0[0])

0x1

HCLKSEL

0x7

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