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A7101CLTK2/T0BC2BY Datasheet(PDF) 23 Page - NXP Semiconductors |
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A7101CLTK2/T0BC2BY Datasheet(HTML) 23 Page - NXP Semiconductors |
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23 / 24 page ![]() 512330 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product short data sheet COMPANY PUBLIC Rev. 3.1 — 10 September 2020 512331 23 of 24 continued >> NXP Semiconductors A71CL Plug & Trust Secure Element 19. Tables Table 1. A71CL commercial name format . . . . . . . . . . . .2 Table 2. Ordering information . . . . . . . . . . . . . . . . . . . . . .6 Table 3. A71CL feature table . . . . . . . . . . . . . . . . . . . . . .6 Table 4. A71CL type description. . . . . . . . . . . . . . . . . . . .6 Table 5. I2C address. . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Table 6. Pin description HVSON8 . . . . . . . . . . . . . . . . . .9 Table 7. Reel packing options . . . . . . . . . . . . . . . . . . . . 11 Table 8. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 9. Recommended operating conditions . . . . . . . .12 Table 10. Electrical DC characteristics of I2C_SCL, I2C_SDA and RST_N . . . . . . . . . . . . . . . . . . .13 Table 11. Electrical characteristics of IC supply voltage VDD; VSS = 0 V; Tamb = -40 to +90 °C . . . . . . . . . . . 15 Table 12. Electrical characteristics of IC supply voltage VDD; VSS = 0 V; Tamb = -40 to +90 °C . . . . . . . . . . . 16 Table 13. Non-volatile memory timing characteristics; VDD = 1.8 V ± 10% or 3 V ± 10% V; VSS = 0 V; Tamb = -40 to 90 °C . . . . . . . . . . . . . . . . . . . . . 16 Table 14. Electrical AC characteristics of I2C_SDA, I2C_SCL, and RST_N[1]; VDD = 1.8 V ± 10% or 3 V ± 10% V; VSS = 0 V; Tamb = -40 to 90 °C . . . . . . . . . . . . . . . . . . . . . 16 Table 15. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 16. Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 20. Figures Fig 1. Pin configuration for HVSON-8 (SOT909-1) . . . . .9 Fig 2. Package outline SOT909-1 . . . . . . . . . . . . . . . . .10 Fig 3. Recommended operating conditions over voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Fig 4. Input characteristic of RST_N . . . . . . . . . . . . . . .14 Fig 5. External clock drive and AC test timing reference points of I2C_SDA, I2C_SCL, and RST_N (see Table note [3] and Table note [4]) in open drain mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 21. Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 General description . . . . . . . . . . . . . . . . . . . . . . 2 2.1 A71CL naming conventions . . . . . . . . . . . . . . . 2 2.2 I2C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.3 Security licensing . . . . . . . . . . . . . . . . . . . . . . . 2 3 Features and benefits . . . . . . . . . . . . . . . . . . . . 3 3.1 Key benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3.2 Security features. . . . . . . . . . . . . . . . . . . . . . . . 3 3.3 Cryptography features . . . . . . . . . . . . . . . . . . . 3 3.4 Functional features . . . . . . . . . . . . . . . . . . . . . . 4 4 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4.1 Use Cases and target applications . . . . . . . . . . 5 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 6 5.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 6 5.1.1 Ordering A71CL samples . . . . . . . . . . . . . . . . . 6 6 Functional description . . . . . . . . . . . . . . . . . . . 7 6.1 I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.2 Automatic Communication Mode detection at Power on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.3 Power-saving modes . . . . . . . . . . . . . . . . . . . . 7 6.3.1 SLEEP mode . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.3.2 DEEP SLEEP mode . . . . . . . . . . . . . . . . . . . . . 8 7 Pinning information . . . . . . . . . . . . . . . . . . . . . 9 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7.1.1 Pinning HVSON8 . . . . . . . . . . . . . . . . . . . . . . . 9 8 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 10 9 Packing information . . . . . . . . . . . . . . . . . . . . . 11 9.1 Reel packing . . . . . . . . . . . . . . . . . . . . . . . . . . 11 10 Electrical and timing characteristics. . . . . . . . 11 11 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 Recommended operating conditions . . . . . . 12 13 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 13 13.1 DC characteristics . . . . . . . . . . . . . . . . . . . . . 13 13.1.1 General and I2C I/O interface . . . . . . . . . . . . 13 13.1.2 I2C interface at 3V3 mode operation[1] . . . . . 15 13.1.3 I2C interface at 1V8 mode operation[1] . . . . . 16 13.2 AC characteristics . . . . . . . . . . . . . . . . . . . . . 16 13.3 EMC/EMI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 18 15 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . 20 17 Legal information . . . . . . . . . . . . . . . . . . . . . . 21 17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 |
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