AT25FF081A datasheet(97/122 Pages) DIALOG

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Datasheet

5-Aug-2021

DS-AT25FF081A-183

Revision G

AT25FF081A

Datasheet

8 Mbit, 1.65 V - 3.6 V Range

SPI Serial Flash Memory with Multi-I/O Support

7.29 DEEP POWER DOWN (B9H)

The Deep Power-Down command is used in conjunction with bit 7 (PDM) in Status register 4 to place the device into Deep Power-

Down mode. When the PDM bit is set and the B9h command is executed, the device enters Deep Power Down mode.

When the device is in Deep Power-Down mode, most commands, including the Read Status Register command, are ignored.

The only commands that are accepted while in this mode are the Resume from Deep Power-Down command (ABh), the Enable

Reset command (66h), and the Reset Device (99h) commands. Since all other commands are ignored, the mode can be used

as an extra protection mechanism against program and erase operations. When the CS pin is deasserted, the device enters the

Deep Power-Down mode within the maximum time of tEDPD.

7.29.1 Transfer Format

The B9h command follows the 1-0-0 transfer format described in Section 5.2, where the command is transferred on the SI pin.

No address or data are transferred for this command. See Figure 3 for a timing diagram of this operation.

7.29.2 Transfer Sequence

To perform the Deep Power Down operation, the CS pin is asserted and the information transferred as follows:



The B9h command is clocked into the device. Eight clocks are required to transfer the command. The most significant bit of

the command is transferred first.



When the CS pin is deasserted, the device begins the power down operation.

See Table 20 for more information on the transfer sequence for this command.

7.29.3 Programming Restrictions

The Deep Power Down command adheres to the following programming restrictions.



The CS pin must be deasserted on a byte boundary (multiple of eight bits). Otherwise, the device aborts the operation.



The B9h command is ignored if an internally self-timed operation such as a program or erase cycle is in progress. In this

case, the B9h command must be reissued after the internally self-timed operation has been completed. Software can mon-

itor the RDY/BSY bit in Status Register 1 to determine when the program or erase operation has completed.

AT25FF081A Datasheet(PDF) 97 Page - Dialog Semiconductor