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SLG46855-AP Datasheet(PDF) 44 Page - Dialog Semiconductor

Part # SLG46855-AP
Description  Auto Grade GreenPAK Programmable Mixed-Signal Matrix
PDF  199 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

SLG46855-AP Datasheet(HTML) 44 Page - Dialog Semiconductor

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Datasheet
17-Jun-2021
CFR0011-120-00
Revision 3.0
44 of 199
© 2021 Dialog Semiconductor
SLG46855-A
Auto Grade GreenPAK Programmable Mixed-Signal Matrix
6.2 MATRIX OUTPUT TABLE
Table 24: Matrix Output Table
Register Bit
Address
Matrix Output Signal Function
Matrix Output
Number
[5:0]
IN0 of LUT2_0 or Clock Input of DFF0
0
[11:6]
IN1 of LUT2_0 or Data Input of DFF0
1
[17:12]
IN0 of LUT2_1 or Clock Input of DFF1
2
[23:18]
IN1 of LUT2_1 or Data Input of DFF1
3
[29:24]
IN0 of LUT2_2 or Clock Input of DFF2
4
[35:30]
IN1 of LUT2_2 or Data Input of DFF2
5
[41:36]
IN0 of LUT2_3 or Clock Input of PGen
6
[47:42]
IN1 of LUT2_3 or nRST of PGen
7
[53:48]
IN0 of LUT3_0 or CLK Input of DFF3
8
[59:54]
IN1 of LUT3_0 or Data of DFF3
9
[65:60]
IN2 of LUT3_0 or nRST (nSET) of DFF3
10
[71:66]
IN0 of LUT3_1 or CLK Input of DFF4
11
[77:72]
IN1 of LUT3_1 or Data of DFF4
12
[83:78]
IN2 of LUT3_1 or nRST (nSET) of DFF4
13
[89:84]
IN0 of LUT3_2 or CLK Input of DFF5
14
[95:90]
IN1 of LUT3_2 or Data of DFF5
15
[101:96]
IN2 of LUT3_2 or nRST (nSET) of DFF5
16
[107:102]
IN0 of LUT3_3 or CLK Input of DFF6
17
[113:108]
IN1 of LUT3_3 or Data of DFF6
18
[119:114]
IN2 of LUT3_3 or nRST (nSET) of DFF6
19
[125:120]
IN0 of LUT3_4 or CLK Input of DFF7
20
[131:126]
IN1 of LUT3_4 or Data of DFF7
21
[137:132]
IN2 of LUT3_4 or Data of DFF7
22
[143:138]
IN0 of LUT3_5 or CLK Input of DFF8
23
[149:144]
IN1 of LUT3_5 or Data of DFF8
24
[155:150]
IN2 of LUT3_5 or nRST (nSET) of DFF8
25
[161:156]
IN0 of LUT3_6 or CLK Input of DFF9
26
[167:162]
IN1 of LUT3_6 or Data of DFF9
27
[173:168]
IN2 of LUT3_6 or nRST (nSET) of DFF9
28
[179:174]
IN0 of LUT3_7 or CLK Input of DFF10
29
[185:180]
IN1 of LUT3_7 or Data of DFF10
30
[191:186]
IN2 of LUT3_7 or nRST (nSET) of DFF10
31
[197:192]
IN0 of LUT3_8 or CLK Input of DFF11
32
[203:198]
IN1 of LUT3_8 or CLK Input of DFF11
33
[209:204
IN2 of LUT3_8 or nRST (nSET) of DFF11
34
[215:210]
IN0 of LUT3_12 or CLK Input of DFF16
Delay4 Input (or Counter4 nRST Input)
35
[221:216]
IN1 of LUT3_12 or nRST (nSET) of DFF16
Delay4 Input (or Counter4 nRST Input)
36



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