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Z8F082ASH020SC Datasheet(PDF) 119 Page - Zilog, Inc. |
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Z8F082ASH020SC Datasheet(HTML) 119 Page - Zilog, Inc. |
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119 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y UART Z8 Encore! XP® F08xA Seriess Product Specification 101 COMP_ADDR—Compare Address This 8-bit value is compared to incoming address bytes. UART Baud Rate High and Low Byte Registers The UART Baud Rate High and Low Byte registers (Tables 67 and 68) combine to create a 16-bit baud rate divisor value (BRG[15:0]) that sets the data transmission rate (baud rate) of the UART. The UART data rate is calculated using the following equation: For a given UART data rate, calculate the integer baud rate divisor value using the follow- ing equation: Table 66. UART Address Compare Register (U0ADDR) BITS 7 6 5 4 3 2 1 0 FIELD COMP_ADDR RESET 0 000 00 00 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR F45H Table 67. UART Baud Rate High Byte Register (U0BRH) BITS 7 6 5 4 3 2 1 0 FIELD BRH RESET 1 111 11 11 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR F46H Table 68. UART Baud Rate Low Byte Register (U0BRL) BITS 7 6 5 4 3 2 1 0 FIELD BRL RESET 1 111 11 11 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR F47H UART Baud Rate (bits/s) System Clock Frequency (Hz) 16 UART Baud Rate Divisor Value × ---------------------------------------------------------------------------------------------- = |
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