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Z8F082ASH020SC Datasheet(PDF) 35 Page - Zilog, Inc.

Part # Z8F082ASH020SC
Description  Z8 Encore XP-R F08xA Series with eXtended Peripherals
PDF  244 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8F082ASH020SC Datasheet(HTML) 35 Page - Zilog, Inc.

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PS024705-0405
P R E L I M I N A R Y
Register Map
Z8 Encore! XP® F08xA Series
Product Specification
17
FC2
IRQ0 Enable Low Bit
IRQ0ENL
00
53
FC3
Interrupt Request 1
IRQ1
00
52
FC4
IRQ1 Enable High Bit
IRQ1ENH
00
54
FC5
IRQ1 Enable Low Bit
IRQ1ENL
00
55
FC6
Interrupt Request 2
IRQ2
00
52
FC7
IRQ2 Enable High Bit
IRQ2ENH
00
55
FC8
IRQ2 Enable Low Bit
IRQ2ENL
00
56
FC9–FCC
Reserved
—
XX
FCD
Interrupt Edge Select
IRQES
00
57
FCE
Shared Interrupt Select
IRQSS
00
57
FCF
Interrupt Control
IRQCTL
00
57
GPIO Port A
FD0
Port A Address
PAADDR
00
37
FD1
Port A Control
PACTL
00
38
FD2
Port A Input Data
PAIN
XX
39
FD3
Port A Output Data
PAOUT
00
39
GPIO Port B
FD4
Port B Address
PBADDR
00
37
FD5
Port B Control
PBCTL
00
38
FD6
Port B Input Data
PBIN
XX
39
FD7
Port B Output Data
PBOUT
00
39
GPIO Port C
FD8
Port C Address
PCADDR
00
37
FD9
Port C Control
PCCTL
00
38
FDA
Port C Input Data
PCIN
XX
39
FDB
Port C Output Data
PCOUT
00
39
GPIO Port D
FDC
Port D Address
PDADDR
00
37
FDD
Port D Control
PDCTL
00
38
FDE
Reserved
—
XX
FDF
Port D Output Data
PDOUT
00
39
FE0–FEF
Reserved
—
XX
Watch-Dog Timer (WDT)
Table 7. Register File Address Map (Continued)
Address (Hex)
Register Description
Mnemonic
Reset (Hex)
Page #
XX=Undefined



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