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Z8F082ASH020SC Datasheet(PDF) 154 Page - Zilog, Inc.

Part # Z8F082ASH020SC
Description  Z8 Encore XP-R F08xA Series with eXtended Peripherals
PDF  244 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8F082ASH020SC Datasheet(HTML) 154 Page - Zilog, Inc.

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PS024705-0405
P R E L I M I N A R Y
Flash Memory
Z8 Encore! XP® F08xA Series
Product Specification
136
Program Memory Address[15:9] = PAGE[6:0]. For the Z8F04xx and Z8F02xx devices,
the upper 4 bits must always be 0. For the Z8F01xx devices, the upper 5 bits must always
to 0.
Flash Sector Protect Register
The Flash Sector Protect register is shared with the Flash Page Select Register. When the
Flash Control Register
is written with 73H followed by 5EH, the next write to this
address targets the Flash Sector Protect Register. In all other cases, it targets the Flash
Page Select Register.
This register selects one of the 8 available Flash memory sectors to be protected. The reset
state of each Sector Protect bit is an unprotected state. After a sector is protected by setting
its corresponding register bit, it cannot be unprotected (the register bit cannot be cleared)
without powering down the device.
SPROT7-SPROT0—Sector Protection
Each bit corresponds to a 1024 byte Flash sector. For the Z8 Encore! XP® F08xA Series
devices all bits are used.
Flash Frequency High and Low Byte Registers
The Flash Frequency High and Low Byte registers combine to form a 16-bit value,
FFREQ, to control timing for Flash program and erase operations. The 16-bit binary Flash
Frequency value must contain the system clock frequency (in KHz) and is calculated using
the following equation:.
Flash programming and erasure is not supported for system clock frequencies below
20KHz or above 20MHz. The Flash Frequency High and Low Byte registers must be
loaded with the correct value to ensure proper operation of the device.
Table 82. Flash Sector Protect Register (FPROT)
BITS
7
6
5
4
3
2
1
0
FIELD
SPROT7
SPROT6
SPROT5
SPROT4
SPROT3
SPROT2
SPROT1
SPROT0
RESET
0
000
00
00
R/W
R/WR/W
R/WR/W
R/WR/W
R/WR/W
ADDR
FF9H
FFREQ[15:0]
FFREQH[7:0],FFREQL[7:0]
{}
System Clock Frequency
1000
---------------------------------------------------------------
==
Caution:



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