Z8F082ASH020SC datasheet(159/244 Pages) ZILOG

159 / 244 page

PS024705-0405

P R E L I M I N A R Y

Flash Option Bits

Z8 Encore! XP® F08xA Series

Product Specification

141

Flash Program Memory Address 0000H

WDT_RES—Watch-Dog Timer Reset

0 = Watch-Dog Timer time-out generates an interrupt request. Interrupts must be globally

enabled for the eZ8 CPU to acknowledge the interrupt request.

1 = Watch-Dog Timer time-out causes a system reset. This setting is the default for unpro-

grammed (erased) Flash.

WDT_AO—Watch-Dog Timer Always On

0 = Watch-Dog Timer is automatically enabled upon application of system power. Watch-

Dog Timer can not be disabled.

1 = Watch-Dog Timer is enabled upon execution of the WDT instruction. Once enabled,

the Watch-Dog Timer can only be disabled by a Reset or STOP Mode Recovery. This set-

ting is the default for unprogrammed (erased) Flash.

OSC_SEL[1:0]—Oscillator Mode Selection

00 = On-chip oscillator configured for use with external RC networks (<4MHz).

01 = Minimum power for use with very low frequency crystals (32KHz to 1.0MHz).

10 = Medium power for use with medium frequency crystals or ceramic resonators

(0.5MHz to 5.0MHz).

11 = Maximum power for use with high frequency crystals (5.0MHz to 20.0MHz). This

setting is the default for unprogrammed (erased) Flash.

VBO_AO—Voltage Brown-Out Protection Always On

0 = Voltage Brown-Out Protection is disabled in STOP mode to reduce total power con-

sumption.

1 = Voltage Brown-Out Protection is always enabled including during STOP mode. This

setting is the default for unprogrammed (erased) Flash.

FRP—Flash Read Protect

0 = User program code is inaccessible. Limited control features are available through the

On-Chip Debugger.

1 = User program code is accessible. All On-Chip Debugger commands are enabled. This

setting is the default for unprogrammed (erased) Flash.

Reserved—Must be 1.

Table 87. Flash Option Bits at Program Memory Address 0000H

BITS

FIELD

WDT_RES WDT_AO

OSC_SEL[1:0]

VBO_AO

FRP

Reserved

FWP

RESET

UUU

R/W

R/WR/W

ADDR

Program Memory 0000H

Note: U = Unchanged by Reset. R/W = Read/Write.

Z8F082ASH020SC Datasheet(PDF) 159 Page - Zilog, Inc.

Z8F082ASH020SC Datasheet(HTML) 159 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL