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SH7041A Datasheet(PDF) 579 Page - Renesas Technology Corp |
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SH7041A Datasheet(HTML) 579 Page - Renesas Technology Corp |
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579 / 923 page ![]() 541 Table 15.3 Analog Input Channel and ADDR Correspondence Analog Input Channel A/D Data Register AN0 ADDRA* AN1 ADDRB* AN2 ADDRC* AN3 ADDRD* AN4 ADDRE AN5 ADDRF AN6 ADDRG AN7 ADDRH Note: * Except during buffer operation 15.2.2 A/D Control/Status Register (ADCSR) The ADCSR is an 8-bit read/write register used for A/D conversion operation control and to indicate status. The ADCSR is initialized to H'00 by power-on reset or in standby mode. Manual reset does not initialize ADCSR. Bit: 7 6 5 4 3 2 1 0 ADF ADIE ADST CKS GRP CH2 CH1 CH0 Initial value: 0 0 0 0 0 0 0 0 R/W: R/(W)* R/W R/W R/W R/W R/W R/W R/W Note: * The only value that can be written is a 0 to clear the flag. |
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