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SH7041A Datasheet(PDF) 582 Page - Renesas Technology Corp |
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SH7041A Datasheet(HTML) 582 Page - Renesas Technology Corp |
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582 / 923 page  544 15.2.3 A/D Control Register (ADCR) The ADCR is an 8-bit read/write register used for A/D conversion operation control. The ADCR is initialized to H'00 by power-on reset or in standby mode. Manual reset does not initialize. Bit: 7 6 5 4 3 2 1 0 — PWR TRGS1 TRGS0 SCAN DSMP BUFE1 BUFE0 Initial value: 0 0 0 0 0 0 0 0 R/W: R R/W R/W R/W R/W R/W R/W R/W • Bit 7—Reserved: This bit always reads as 0. The write value should always be 0. • Bit 6—Power (PWR): Designates the conversion start mode for the high speed A/D converter. Setting the PWR bit to 1 sets high speed start mode, and a 0 sets to low power conversion mode. See section 15.4.7, Conversion Start Modes, for details on the conversion start operation. Set the PWR bit only while conversion is halted. Bit 6: PWR Description 0 Low power conversion mode (initial value) 1 High speed start mode • Bits 5 and 4—Timer Trigger Select 1, 0 (TRGS1, TRGS0): These bits enable or prohibit A/D conversion starts by trigger signals. Set the TRGS1, TRGS0 bits only while conversion is halted. Bit 5: TRGS1 Bit 4: TRGS0 Description 0 0 Enable A/D conversion start by software (initial value) 0 1 Enables A/D conversion start by MTU conversion start trigger 1 0 Reserved 1 1 Enables A/D conversion start by external trigger pin ( ADTRG) • Bit 3—Scan Mode (SCAN): Selects either single mode or scan mode for the A/D conversion operation mode. See section 15.4, Operation, for details on single mode and scan mode operation. Set the SCAN bit only while conversion is halted. Bit 3: SCAN Description 0 Single mode (initial value) 1 Scan mode |
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