SH7041A datasheet(757/923 Pages) RENESAS

757 / 923 page

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22.8.2

Software Protection

Software protection can be implemented by setting the SWE bit in FLMCR1, erase block register

1 (EBR1), erase block register 2 (EBR2), and the RAMS bit in the RAM emulation register

(RAMER). When software protection is in effect, setting the P1 or E1 bit in flash memory control

cause a transition to program mode or erase mode. (See table 22.9.)

Software protect can be enabled by setting the SWE bit of FLMCR1, block specification register 1

(EBR1), block specification register 2 (EBR2) and the RAMS bit of the RAM emulation register.

During software protect, transition cannot be made to the program mode or the erase mode even

when setting P1 or E1 bits of the flash memory control register 1 (FLMCR1), or P2 or E2 bits of

flash memory control register 2 (FLMCR2). (See table 22.9.)

Table 22.9

Software Protection

Function

Item

Description

Program Erase

SWE bit protection •

Clearing the SWE bit to 0 in FLMCR1 sets the

program/erase-protected state for all blocks.

(Execute in on-chip RAM or external memory.)

Yes

Block specification

protection

• Erase protection can be set for individual blocks by

settings in erase block register 1 (EBR1) and erase

block register 2 (EBR2).

• Setting EBR1 and EBR2 to H'00 places all blocks in

the erase-protected state.

—

Yes

Emulation

protection

• Setting the RAMS bit to 1 in the RAM emulation

program/erase-protected state.

Yes

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