SH7041A datasheet(761/923 Pages) RENESAS

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H'000000

H'03F000

H'03F400

H'03F800

H'03FC00

H'03FFFF

EB0 to 7

EB11

EB10

EB9

EB8

H'FFFFF800

H'FFFFFBFF

On-chip RAM

Flash memory

This area can be accessed

from both RAM and flash memory

Figure 22.17 Example of RAM Overlap Operation

Example in which Flash Memory Block Area (EB8) is Overlapped

1. Set bits RAMS, RAM1, and RAM0 in RAMER to 1, 0, 1, to overlap part of RAM onto the

area (EB8) for which real-time programming is required.

2. Real-time programming is performed using the overlapping RAM.

3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.

4. The data written in the overlapping RAM is written into the flash memory space (EB8).

Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks

regardless of the value of RAM1 and RAM0 (emulation protection). In this state,

setting the P1 or E1 bit in flash memory control register 1 (FLMCR1), or the P2 or E2

bit in flash memory control register 2 (FLMCR2), will not cause a transition to

program mode or erase mode. When actually programming or erasing a flash memory

area, the RAMS bit should be cleared to 0.

2. A RAM area cannot be erased by execution of software in accordance with the erase

algorithm while flash memory emulation in RAM is being used.

SH7041A Datasheet(PDF) 761 Page - Renesas Technology Corp