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SH7041A Datasheet(PDF) 762 Page - Renesas Technology Corp |
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SH7041A Datasheet(HTML) 762 Page - Renesas Technology Corp |
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762 / 923 page ![]() 724 22.10 Note on Flash Memory Programming/Erasing In the on-board programming modes (user mode and user program mode), NMI input should be disabled to give top priority to the program/erase operations (including RAM emulation). 22.11 Flash Memory Programmer Mode Programs and data can be written and erased in programmer mode as well as in the on-board programming modes. In programmer mode, flash memory read mode, auto-program mode, auto- erase mode, and status read mode are supported. In auto-program mode, auto-erase mode, and status read mode, a status polling procedure is used, and in status read mode, detailed internal signals are output after execution of an auto-program or auto-erase operation. In programmer mode, set the mode pins to PLL x2 mode (see table 22.10) and use a 6 MHz input clock. The LSI will then operate at 12 MHz. Table 22.10 shows the pin settings for programmer mode. For the pin names in programmer mode, see section 1.3.2, Pin Arrangement by Mode). Table 22.10 Programming Mode Pin Settings Pin Names Settings Mode pin: MD3, MD2, MD1, MD0 1101 (PLL × 2) FWE pin High level input (in auto-program and auto- erase modes) RES pin Power-on reset circuit XTAL, EXTAL, PLLVcc, PLLCAP, and PLLVss pins Oscillator circuit Note: During the programming mode, polarity of the FWP pin is inverted and becomes the FWE (flash write enable) pin. |
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