SH7041A datasheet(786/923 Pages) RENESAS

Part #	SH7041A

Description	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

786 / 923 page

748

24.4.3

Standby Mode Application Example

This example describes a transition to standby mode on the falling edge of an NMI signal, and a

cancellation on the rising edge of the NMI signal. The timing is shown in figure 24.1.

When the NMI pin is changed from high to low level while the NMI edge select bit (NMIE) of the

ICR is set to 0 (falling edge detection), the NMI interrupt is accepted. When the NMIE bit is set to

1 (rising edge detection) by an NMI exception service routine, the standby bit (SBY) of the

SBYCR is set to 1, and a SLEEP instruction is executed, standby mode is entered. Thereafter,

standby mode is canceled when the NMI pin is changed from low to high level.

Oscillator

NMI

NMIE

SBY

NMI

exception

processing

Exception

service

routine

SBY = 1

SLEEP

instruction

Standby

mode

Oscillation

start

time

WDT

time

set

NMI

exception

processing

Oscillation

settling time

Figure 24.1 Standby Mode NMI Timing (Application Example)

SH7041A Datasheet(PDF) 786 Page - Renesas Technology Corp