SH7041A datasheet(259/923 Pages) RENESAS

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11.2.4

DMA Channel Control Registers 0–3 (CHCR0–CHCR3)

DMA channel control registers 0–3 (CHCR0–CHCR3) is a 32-bit read/write register where the

operation and transmission of each channel is designated. They are initialized by a power-on reset

and in software standby mode. There is no initializing with manual reset.

Bit:

——

———

—

Initial value:

—

R/W:

Bit:

——

—

DI*

RO*

RL*

AM*

AL*

Initial value:

—

(R/W)

Bit:

DM1

DM0

SM1

SM0

RS3

RS2

RS1

RS0

Initial value:

R/W:

R/W

Bit:

—DS*

TS1

TS0

Initial value:

—

R/W:

(R/W)

R/W

R/(W) *

R/W

Notes: *1 TE bit: Allows only 0 write after reading 1.

*2 The DI, RO, RL, AM, AL, or DS bit may be absent, depending on the channel.

• Bits 31–21—Reserved bits: Data are 0 when read. The write value always be 0.

• Bit 20—Direct/Indirect (DI): Specifies either direct address mode operation or indirect address

mode operation for channel 3 source address. This bit is valid only in CHCR3. It always reads

0 for CHCR0–CHCR2, and cannot be modified.

Bit 20: DI

Description

Direct access mode operation for channel 3 (initial value)

Indirect access mode operation for channel 3

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