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ES9038Q2M Datasheet(PDF) 28 Page - ESS Technology,Inc |
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ES9038Q2M Datasheet(HTML) 28 Page - ESS Technology,Inc |
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28 / 65 page ![]() CONFIDENTIAL Rev. 1.3 July 17, 2019 ES9038Q2M Datasheet ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643- 8800 • Fax (408) 643-8801 28 Register 14: Soft Start Configuration Bits [7] [6] [5] [4:0] Mnemonic soft_start soft_start_on_lock reserved soft_start_time Default 1’b0 1’b0 1’b0 5’d10 Bit Mnemonic Description [7] soft_start The Sabre DAC initializes both DAC and DACB to GND and then ramps up the output to AVCC/2. DAC and DACB remain in phase until the ramp is complete. Soft_start controls the ramp operation and defaults to 1’b0. This bit must be set to 1’b1 in order for the DAC to have analog outputs. • 1’b0: Ramps the output stream to ground (default) • 1’b1: Normal Operation, will ramp the output to AVCC/2 [6] soft_start_on_l ock Automatically ramps the output to AVCC/2. • 1’b0: Always soft start (default) • 1’b1: Soft start and output ramps to AVCC/2 when locked. When the DAC is unlocked the outputs will ramp to GND. The output will not ramp to AVCC/2 if Reg 14 [7] is set to 1’b0. [5] reserved [4:0] soft start time Sets the amount of time that it takes to perform a soft start ramp. This time affects both ramp to ground and ramp to AVCC/2. This value is valid from 0 to 20 (inclusive). time (s) = 4096 ∗ 2(soft_start_time+1) MCLK (Hz) |
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