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STM32H750VB Datasheet(PDF) 286 Page - STMicroelectronics

Part # STM32H750VB
Description  32-bit Arm® Cortex®-M7 480MHz MCUs, 128 Kbyte Flash, 1 Mbyte RAM, 46 com. and analog interfaces, crypto
PDF  335 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H750VB Datasheet(HTML) 286 Page - STMicroelectronics

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Electrical characteristics (rev V)
STM32H750VB STM32H750ZB STM32H750IB STM32H750XB
286/334
DS12556 Rev 5
7.3.28
Digital filter for Sigma-Delta Modulators (DFSDM) characteristics
Unless otherwise specified, the parameters given in Table 196 for DFSDM are derived from
tests performed under the ambient temperature, fPCLKx frequency and supply voltage
conditions summarized in Table 120: General operating conditions.
Output speed is set to OSPEEDRy[1:0] = 10
Capacitive load CL = 30 pF
Measurement points are done at CMOS levels: 0.5VDD
VOS level set to VOS1
Refer to Section 7.3.15: I/O port characteristics for more details on the input/output alternate
function characteristics (DìFSDM_CKINx, DFSDM_DATINx, DFSDM_CKOUT for DFSDM).
PGA BW
PGA bandwidth for
different non inverting gain
Gain=2
-
GBW/2
-
MHz
Gain=4
-
GBW/4
-
Gain=8
-
GBW/8
-
Gain=16
-
GBW/16
-
PGA bandwidth for
different inverting gain
Gain = -1
-
5.00
-
MHz
Gain = -3
-
3.00
-
Gain = -7
-
1.50
-
Gain = -15
-
0.80
-
en
Voltage noise density
at
1 KHz
output loaded
with 4 kΩ
-140
-
nV/√
Hz
at
10 KHz
-55
-
IDDA(OPAMP)
OPAMP consumption from
VDDA
Normal
mode
no Load,
quiescent mode,
follower
-
570
1000
µA
High-
speed
mode
-
610
1200
1.
RLOAD is the resistive load connected to VSSA or to VDDA.
2. R2 is the internal resistance between the OPAMP output and th OPAMP inverting input. R1 is the internal resistance
between the OPAMP inverting input and ground. PGA gain = 1 + R2/R1.
Table 195. Operational amplifier characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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