STM32H750VB datasheet(305/335 Pages) STMICROELECTRONICS

305 / 335 page

DS12556 Rev 5

305/334

STM32H750VB STM32H750ZB STM32H750IB STM32H750XB

Electrical characteristics (rev V)

311

CMD, D inputs (referenced to CK) in SD default mode

tISUD

Input setup time SD

1.5

tIHD

Input hold time SD

1.5

CMD, D outputs (referenced to CK) in SD default mode

tOVD

Output valid default time SD

0.5

tOHD

Output hold default time SD

1. Guaranteed by characterization results.

2. Above 100 MHz, CL = 20 pF.

3. An external voltage converter is required to support SD 1.8 V.

4. The minimum window of time where the data needs to be stable for proper sampling in tuning mode.

Table 207. Dynamics characteristics: SD / MMC characteristics, VDD=2.7 to 3.6 V(1)(2) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 208. Dynamics characteristics: eMMC characteristics VDD=1.71V to 1.9V(1)(2)

1. Guaranteed by characterization results.

2. CL = 20 pF.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPP

Clock frequency in data transfer

mode

-0

120

MHz

SDIO_CK/fPCLK2 frequency ratio

8/3

tW(CKL)

Clock low time

fPP =52 MHz

8.5

9.5

tW(CKH)

Clock high time

fPP =52 MHz

8.5

9.5

CMD, D inputs (referenced to CK) in eMMC mode

tISU

Input setup time HS

tIH

Input hold time HS

2.5

tIDW(3)

3. The minimum window of time where the data needs to be stable for proper sampling in tuning mode.

Input valid window (variable

window)

-3.5

CMD, D outputs (referenced to CK) in eMMC mode

tOVD

Output valid time HS

tOHD

Output hold time HS

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