PC8374L datasheet(2/239 Pages) NSC

2 / 239 page

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Revision 1.1

Features

System Health Support

■ SensorPath

interface

sensors

optimizes

digital/analog partitioning

— Simpliﬁes board design and routing

— Supports distributed sensors and centralized control

— Health monitoring is self-contained and requires

minimal host attention

— Faster boot time

— Off loads SMBus, and enables ASF compliance

■ Fan Monitor and Control

— Three PWM-based fan controls

— Four 16-bit resolution tachometer inputs

— Software or local temperature feedback control

■ Heceta6-compatible register set accessible via the

LPC interface and SMBus

— Supports the following combinations of LMxx devices:

❏ LM96011 and optional LM95010

❏ LM96012

❏ LM96010

— Simultaneous read support via LPC interface and SMBus

Glue Functions

■ Generates the power-related signals:

— Main Power good

— Power distribution control (for switching between

Main and Standby regulators)

— Resume reset (Master Reset) according to the 5V

standby supply status

— Main power supply turn on (PS_ON)

■ Voltage translation between 2.5V or 3.3V levels (DDC) and

5V levels (VGA) for the SMBus serial clock and data signals

■ Isolation circuitry for the SMBus serial clock and data signals

■ Buffers PCI_RESET to generate two reset output signals

■ Buffers PCI_RESET to generate IDE reset output.

■ Generates “highest active supply” reference voltage

— Based on 3.3V and 5V Main supplies

— Based on 3.3V and 5V Standby supplies

■ High-current LED driver control for Hard Disk Drive

activity indication

■ Software selectable alternative functionality, through pin

multiplexing

General-Purpose I/O (GPIO) Ports

■ All 16 GPIO ports powered by VSB3

■ Each pin individually configured as input or output

■ Programmable features for each output pin:

— Drive type (open-drain, push-pull or TRI-STATE)

— TRI-STATE

detection

falling

VDD3 for

VSB3-powered pins driving VDD-supplied devices

■ Programmable option for internal pull-up resistor on each

input pin (some with internal pull-down resistor option)

■ Lock option for the configuration and data of each output pin

■ 15 GPIO ports generate IRQ/SIOPME for wake-up

events; each GPIO has separate:

— Enable control of event status routing to IRQ

— Enable control of event status routing to SIOPME (via SWC)

— Polarity and edge/level selection

❏ Programmable debouncing

Power Management

■ Supports ACPI Specification Revision 2.0b, July 27, 2000

■ System Wake-Up Control (SWC)

— Optional

routing

events

generate

SCI

(SIOPME) on detection of:

❏ Keyboard or Mouse events

❏ Ring Indication RI on each of the two serial ports

❏ General-Purpose Input Events from 15 GPIO pins

❏ IRQs of the Keyboard and Mouse Controller

❏ IRQs of the other internal modules

— Optional routing of the SCI (SIOPME) to generate

IRQ (SERIRQ)

— Implements the GPE1_BLK of the ACPI General Pur-

pose (Generic) Register blocks with “child” events

— VSB3-powered event detection and event-logic

conﬁguration

■ Enhanced Power Management (PM), including:

— Special conﬁguration registers for power down

— Low-leakage pins

— Low-power CMOS technology

— Ability to disable all modules

— High-current LED drivers control (two LEDs) for

power status indication with:

❏ Standard blinking, controlled by software

❏ Advanced blinking, controlled by power supply

status, sleep state or software

❏ Special blinking, controlled by power supply sta-

tus, sleep state and software bit

— VBAT-powered indication of the Main power supply

state before an AC power failure

■ Keyboard Events

— Wake-up on any key

— Supports programmable 8-byte sequence “Pass-

word” or “Special Keys” for Power Management

— Simultaneous recognition of three programmable

keys (sequences): “Power”, “Sleep” and “Resume”

— Wake-up on mouse movement and/or button click

Bus Interface

■ LPC Bus Interface

— Based on Intel’s LPC Interface Speciﬁcation Revi-

sion 1.1, August 2002

— I/O, Memory and 8-bit Firmware Memory read and

write cycles

— Up to four 8-bit DMA channels

— Serial IRQ (SERIRQ)

— Supports registers memory and I/O mapping

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PC8374L Datasheet(PDF) 2 Page - National Semiconductor (TI)

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