PC8374L datasheet(9/239 Pages) NSC

9 / 239 page

Table of Contents (Continued)

Revision 1.1

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4.3.11

PS2 Keyboard Key Data 0 to 7 Registers (PS2KEY0-7) ............................................. 98

4.4

ACPI REGISTERS ..................................................................................................................... 99

4.4.1

ACPI Register Map ...................................................................................................... 99

4.4.2

General-Purpose Status 1 Register (GPE1_STS) ..................................................... 100

4.4.3

General-Purpose Enable 1 Register (GPE1_EN) ...................................................... 100

4.4.4

General-Purpose Status 1 Register 0 (GPE1_STS_0) .............................................. 101

4.4.5

General-Purpose Status 1 Register 1 (GPE1_STS_1) .............................................. 101

4.4.6

General-Purpose Status 1 Register 2 (GPE1_STS_2) .............................................. 102

4.4.7

General-Purpose Status 1 Register 3 (GPE1_STS_3) .............................................. 103

4.4.8

General-Purpose Enable 1 Register 0 (GPE1_EN_0) ............................................... 104

4.4.9

General-Purpose Enable 1 Register 1 (GPE1_EN_1) ............................................... 104

4.4.10

General-Purpose Enable 1 Register 2 (GPE1_EN_2) ............................................... 105

4.4.11

General-Purpose Enable 1 Register 3 (GPE1_EN_3) ............................................... 106

4.5

SYSTEM WAKE-UP CONTROL REGISTER BITMAP ............................................................ 107

5.0

LPC Bus Interface

5.1

OVERVIEW ............................................................................................................................. 109

5.2

LPC TRANSACTIONS ............................................................................................................. 109

5.3

INTERRUPT SERIALIZER ...................................................................................................... 109

6.0

General-Purpose Input/Output (GPIO) Ports

6.1

OVERVIEW ............................................................................................................................. 110

6.2

BASIC FUNCTIONALITY ........................................................................................................ 111

6.2.1

Configuration Options ................................................................................................ 111

6.2.2

Operation ................................................................................................................... 112

6.3

EVENT HANDLING AND SYSTEM NOTIFICATION .............................................................. 113

6.3.1

Event Configuration ................................................................................................... 113

6.3.2

System Notification .................................................................................................... 114

6.4

GPIO PORT REGISTERS ....................................................................................................... 115

6.4.1

GPIO Pin Configuration Registers Structure ............................................................. 115

6.4.2

GPIO Port Runtime Register Map ............................................................................. 115

6.4.3

GPIO Data Out Register (GPDO) .............................................................................. 116

6.4.4

GPIO Data In Register (GPDI) .................................................................................. 116

6.4.5

GPIO Event Enable Register (GPEVEN) .................................................................. 116

6.4.6

GPIO Event Status Register (GPEVST) .................................................................... 117

6.4.7

GPIO Data In/Out Register (GPDIO) ......................................................................... 117

7.0

Glue Functions

7.1

OVERVIEW ............................................................................................................................. 118

7.2

FUNCTIONAL DESCRIPTION ................................................................................................ 118

7.2.1

Highest Active Main Supply Reference ..................................................................... 118

7.2.2

Highest Active Standby Supply Reference ................................................................ 120

7.2.3

Resume Reset ........................................................................................................... 122

7.2.4

Main Power Good ...................................................................................................... 123

7.2.5

Power Distribution Control ......................................................................................... 123

7.2.6

Main Power Supply Control ....................................................................................... 124

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PC8374L Datasheet(PDF) 9 Page - National Semiconductor (TI)

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