256K x 16 Static RAM

WCFS4016C1C

Revised April 19, 2002

1041B

Features

• High speed

• 2.0V Data Retention (400

µW at 2.0V retention)

• Automatic power-down when deselected

• TTL-compatible inputs and outputs

• Easy memory expansion with CE and OE features

Functional Description

The WCFS4016C1C is a high-performance CMOS static RAM

organized as 262,144 words by 16 bits.

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

Reading from the device is accomplished by taking Chip En-

able (CE) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then

data from the memory location specified by the address pins

truth table at the back of this data sheet for a complete descrip-

tion of read and write modes.

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), the BHE and BLE

are disabled (BHE, BLE HIGH), or during a write operation (CE

LOW, and WE LOW).

The WCFS4016C1C is available in a standard 44-pin

400-mil-wide SOJ package.

Logic Block Diagram

Pin Configuration

COLUMN

DECODER

INPUT BUFFER

256K x 16

ARRAY

1024 x 4096

OE

CE

WE

BLE

BHE

WE

1

2

3

4

5

6

7

8

9

10

11

14

31

32

36

35

34

33

37

40

39

38

Top View

SOJ

12

13

41

44

43

42

16

15

29

30

OE

CE

BHE

18

17

20

19

27

28

25

26

22

21

23

24

BLE

NC

Selection Guide

WCFS4016C1C 15ns

Maximum Access Time (ns)

15

Maximum Operating Current (mA)

190

Maximum CMOS Standby Current (mA)

3