STM32F730V8 datasheet(153/202 Pages) STMICROELECTRONICS

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DS12536 Rev 2

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STM32F730x8

Electrical characteristics

185

I2S interface characteristics

Unless otherwise specified, the parameters given in Table 82 for the I2S interface are

derived from tests performed under the ambient temperature, fPCLKx frequency and VDD

supply voltage conditions summarized in Table 16, with the following configuration:

•

Output speed is set to OSPEEDRy[1:0] = 10

•

Capacitive load C = 30 pF

•

Measurement points are done at CMOS levels: 0.5VDD

Refer to Section 6.3.20: I/O port characteristics for more details on the input/output alternate

function characteristics (CK, SD, WS).

Note:

Refer to RM0431 reference manual I2S section for more details on the sampling frequency

(FS).

fMCK, fCK, and DCK values reflect only the digital peripheral behavior. The values of these

parameters might be slightly impacted by the source clock precision. DCK depends mainly

on the value of ODD bit. The digital contribution leads to a minimum value of

(I2SDIV/(2*I2SDIV+ODD) and a maximum value of (I2SDIV+ODD)/(2*I2SDIV+ODD). FS

maximum value is supported for each mode/condition.

Table 82. I2S dynamic characteristics(1)

Symbol

Parameter

Conditions

Min

Max

Unit

fMCK

I2S Main clock output

256 x 8K

256xFs(2)

MHz

fCK

I2S clock frequency

Master data: 32 bits

64xFs

MHz

Slave data: 32 bits

64xFs

DCK

I2S clock frequency duty cycle Slave receiver

tv(WS)

WS valid time

Master mode

th(WS)

WS hold time

Master mode

tsu(WS)

WS setup time

Slave mode

th(WS)

WS hold time

Slave mode

tsu(SD_MR)

Data input setup time

Master receiver

2.5

tsu(SD_SR)

Slave receiver

2.5

th(SD_MR)

Data input hold time

Master receiver

3.5

th(SD_SR)

Slave receiver

tv(SD_ST)

Data output valid time

Slave transmitter (after enable edge)

tv(SD_MT)

Master transmitter (after enable edge)

th(SD_ST)

Data output hold time

Slave transmitter (after enable edge)

th(SD_MT)

Master transmitter (after enable edge)

1. Guaranteed by characterization results.

2. 256xFs maximum is 49.152 MHz (APB1 Maximum frequency).

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