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STM8L052C6 Datasheet(PDF) 65 Page - STMicroelectronics |
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STM8L052C6 Datasheet(HTML) 65 Page - STMicroelectronics |
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65 / 103 page ![]() DocID023331 Rev 2 65/103 STM8L052C6 Electrical parameters 97 tWU_HSI(AH) (9) (10) Wakeup time from Active-halt mode to Run mode (using HSI) -4.7 7 s tWU_LSI(AH) (9) (10) Wakeup time from Active-halt mode to Run mode (using LSI) - 150 - s 1. No floating I/O, unless otherwise specified. 2. RTC enabled. Clock source = LSI 3. RTC enabled, LCD enabled with external VLCD = 3 V, static duty, division ratio = 256, all pixels active, no LCD connected. 4. RTC enabled, LCD enabled with external VLCD, 1/4 duty, 1/3 bias, division ratio = 64, all pixels active, no LCD connected. 5. LCD enabled with internal LCD booster VLCD = 3 V, 1/4 duty, 1/3 bias, division ratio = 64, all pixels active, no LCD connected. 6. Oscillator bypassed (LSEBYP = 1 in CLK_ECKCR). When configured for external crystal, the LSE consumption (IDD LSE) must be added. Refer to Table 29. 7. RTC enabled. Clock source = LSE. 8. Oscillator bypassed (LSEBYP = 1 in CLK_ECKCR). When configured for external crystal, the LSE consumption (IDD LSE) must be added. Refer to Table 29. 9. Wakeup time until start of interrupt vector fetch. The first word of interrupt routine is fetched 4 CPU cycles after tWU. 10. ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register. Table 21. Total current consumption and timing in Active-halt mode at VDD = 1.8 V to 3.6 V Symbol Parameter Conditions (1) Typ Max Unit Table 22. Typical current consumption in Active-halt mode, RTC clocked by LSE external crystal Symbol Parameter Condition(1) Typ Unit IDD(AH) (2) Supply current in Active-halt mode VDD = 1.8 V LSE 1.15 µA LSE/32(3) 1.05 VDD = 3 V LSE 1.30 LSE/32(3) 1.20 VDD = 3.6 V LSE 1.45 LSE/32(3) 1.35 1. No floating I/O, unless otherwise specified. 2. Based on measurements on bench with 32.768 kHz external crystal oscillator. 3. RTC clock is LSE divided by 32. |
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