PAM8907

Document number: DS43314 Rev. 2 - 2

7 of 10

www.diodes.com

May 2021

© Diodes Incorporated

PAM8907

Capacitor Selection Guide

The external capacitors are required to use low ESR ceramic capacitors. It is strongly recommended to place them at the same layout layer as

PAM8907.



Power Supply Decoupling

– VIN (Pin 10)

Capacitor Value: 1

μF +10μF

Voltage Rating: 2 x VIN

Capacitor layout: place the 1

μF capacitor close to VIN (Pin 10), and 10μF close to the inductor



External LDO

– VCC (Pin 1)

Capacitor Value: 1

μF

Voltage Rating: 10V or 16V

Capacitor layout: place the capacitor close to VCC (Pin 1)



Bootstrap

– BOOT (Pin 3)

Capacitor Value: 0.1

μF

Voltage Rating: 25V or higher

Capacitor layout: place the capacitor close to BOOT (Pin 3)



Boost Output

– VOUT (Pin 5)

Capacitor Value: 1

Voltage Rating: 25V or higher

Capacitor layout: place the capacitor close to VOUT (Pin 5)

Schottky Diode

This is optional. A Schottky diode between SW and VOUT (in parallel with high-side FET of the Boost converter) can reduce the power

consumption by approximately 20%. A 20V Schottky with current rating of 1A is preferred.

GND Layout Guideline

The GND layout is important to enable PAM8907 to operate under optimal conditions. Suggested layout for GND is illustrated below. Please

consult with Diodes

Incorporated’s technical support team or field representative for any further assistance, if necessary.

C

onnect first GND (Pin 2) to PAM8907’s epoxy pad, then expand the GND line to VCC/VIN’s capacitor’s GND and place many vias on the GND

trace, then c

onnect with VOUT pin’s CAP GND. Place these capacitors as close as possible to PAM8907.