AS4LC2M8S1 datasheet(8/29 Pages) ALSC

8 / 29 page

5/21/01; v.1.1

Alliance Semiconductor

P. 8 of 29

AS4LC2M8S1

AS4LC1M16S1

AC parameters common to all waveforms

Sym

Parameter

CAS

latency

–7

–8

–10

Unit

Notes

Min

Max

Min

Max

Min

Max

tAC CLK to valid output delay

3–

5.5

–

2–

8.5

–

6,8

–

6,8

tAH Address hold time

–

tAS

Address setup time

–

tBDL Last data-in to burst stop

–

tCK

tCCD

Read/write command to

read/write command

1–

–

tCK

tCDL

Last data-in to new

column address delay

1–

–

tCK

tCH CLK high-level width

2.75

–

tCK CLK cycle time

1000

8.7

1000

tCKED

CKE to CLOCK disable or

power-down entry mode

1–

–

tCK

tCKH CKE hold time

–

tCKS CKE setup time

–

tCL

CLK low-level width

2.75

–

3.5

–

tCMH

CS, RAS, CAS, WE, DQM

hold time

1–

–

tCMS

CS, RAS, CAS, WE, DQM

setup time

2–

–

tDAL

Data-in to ACTIVE

command

–

tCK

5,11

–

tCK

5,11

–

tCK

5,11

tDH Data in hold time

–

tDPL Data in to PRECHARGE

–

tCK

tDQD DQM to input data delay

–

tCK

tDQM

DQM to data mask during

writes

0–

–

tCK

tDQZ

DQM to data high Z

during reads

2–

–

tCK

tDS

Data in setup time

–

tDWD

Write command to input

data delay

0–

–

tCK

tHZ

Data-out high-impedance

time

3–

5.5

–

2–

8.5

–

tLZ

Data-out low-impedance

time

1–

–

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