SCY99080CDWR2G datasheet(24/27 Pages) ONSEMI

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DDA002C

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EN2 Input

This enable input is non−latched and thus can be used

either for simple ON/OFF control or, because of its reaction

time that is maximally 120 ns, as an ultra fast over current

protection input. Connection of the EN 2 comparator can be

seen in Figure 55. Functionality of this input is independent

of any timers i.e. it works immediately when the VCCON

threshold is reached.

EN2

20 ns

Filter

Figure 55. Internal Connection of the EN2 Comparator

VEN2 = 1 V

To Gate Drivers

and Internal Logic

To Input Current

Sensing Circuitry

The EN2 comparator incorporates −50 mV hysteresis − it

means that the controller will restore operation via full

start−up period (i.e. PFC delay, preheat and soft−start) when

EN2 input voltage goes below VEN2−0.05 V. Figure 56

shows the EN2 input related operating waveforms.

PFC_OK

CIG

DRV_Outputs

Vcc

EN2 is not blanked and can stop the IC anytime!

Full startup sequence is placed when EN2 re−enabled.

EN2 triggered

SS_not_finished

CIG_End = 5V

EN2

IC restarts

100 ms

Figure 56. EN2 Input Functionality Description Waveforms

The High−voltage Driver

The controller features an internal high voltage driver that

enables direct connection to the half bridge topologies.

Figure 57 shows the internal architecture of the Lgd and Hgd

drivers section. The device incorporates an upper UVLO

circuitry that ensures adequate Vgs is available for the upper

side MOSFET.

SCY99080CDWR2G Datasheet(PDF) 24 Page - ON Semiconductor

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