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MPC8358ECVRAGDDA Datasheet(PDF) 39 Page - NXP Semiconductors

Part # MPC8358ECVRAGDDA
Description  PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications
PDF  95 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
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MPC8358ECVRAGDDA Datasheet(HTML) 39 Page - NXP Semiconductors

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MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
Freescale Semiconductor
39
Local Bus
9
Local Bus
This section describes the DC and AC electrical specifications for the local bus interface of the
MPC8358E.
9.1
Local Bus DC Electrical Characteristics
Table 38 provides the DC electrical characteristics for the local bus interface.
9.2
Local Bus AC Electrical Specifications
Table 39 describes the general timing parameters of the local bus interface of the device.
Timer alarm to output valid
tTMRAL
———
2
Notes:
1. The timer can operate on rtc_clock or tmr_clock. These clocks get muxed and any one of them can be selected. The
minimum and maximum requirement for both rtc_clock and tmr_clock are the same.
2. These are asynchronous signals.
3. Inputs need to be stable at least one TMR clock.
Table 38. Local Bus DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
High-level output voltage, IOH = –100 μAVOH
OVDD – 0.4
—
V
Low-level output voltage, IOL = 100 μAVOL
—0.2
V
Input current
IIN
—±10
μA
Table 39. Local Bus General Timing Parameters—DLL Enabled
Parameter
Symbol1
Min
Max
Unit
Notes
Local bus cycle time
tLBK
7.5
—
ns
2
Input setup to local bus clock (except LUPWAIT)
tLBIVKH1
1.7
—
ns
3, 4
LUPWAIT input setup to local bus clock
tLBIVKH2
1.9
—
ns
3, 4
Input hold from local bus clock (except LUPWAIT)
tLBIXKH1
1.0
—
ns
3, 4
LUPWAIT input hold from local bus clock
tLBIXKH2
1.0
—
ns
3, 4
LALE output fall to LAD output transition (LATCH hold time)
tLBOTOT1
1.5
—
ns
5
LALE output fall to LAD output transition (LATCH hold time)
tLBOTOT2
3.0
—
ns
6
LALE output fall to LAD output transition (LATCH hold time)
tLBOTOT3
2.5
—
ns
7
Table 37. IEEE 1588 Timer AC Specifications (continued)
Parameter
Symbol
Min
Max
Unit
Notes



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