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ESP32-S2 Datasheet(PDF) 29 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

Part # ESP32-S2
Description  SoC with Xtensa® SingleCore 32bit LX7 Microprocessor Supporting IEEE 802.11b/g/n (2.4 GHz WiFi)
PDF  51 Pages
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Manufacturer  ESPRESSIF [ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.]
Direct Link  https://www.espressif.com/
Logo ESPRESSIF - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

ESP32-S2 Datasheet(HTML) 29 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.

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Functional Description
• Modem-sleep mode: The CPU is operational and the clock speed can be reduced. The Wi-Fi baseband
and radio are disabled, but Wi-Fi connection can remain active.
• Light-sleep mode: The CPU is paused. The RTC peripherals, as well as the ULP co-processor are running.
Any wake-up events (MAC, host, RTC timer, or external interrupts) will wake up the chip. Wi-Fi connection
can remain active.
• Deep-sleep mode: Only the RTC memory and RTC peripherals are powered on. Wi-Fi connection data are
stored in the RTC memory. The ULP co-processor is functional.
• Hibernation mode: The internal 8-MHz oscillator and ULP co-processor are disabled. The RTC recovery
memory is powered down. Only one RTC timer on the slow clock and certain RTC GPIOs are active. The
RTC timer or the RTC GPIOs can wake up the chip from the Hibernation mode.
For power consumption in different power modes, please refer to Table 4.6.2.
3.6.2 Ultra­Low­Power Co­processor
The ULP co-processor is designed as a simplified, low-power replacement of CPU in sleep modes. It can be also
used to supplement the functions of the CPU in normal working mode. The ULP co-processor and RTC memory
remain powered on during the Deep-sleep mode. Hence, the developer can store a program for the ULP
co-processor in the RTC slow memory to access RTC GPIO, RTC peripheral devices, RTC timers and internal
sensors during the Deep-sleep mode.
ESP32-S2 has two ULP co-processors, with one based on RISC-V instruction set architecture (ULP-RISC-V) and
the other on finite state machine (ULP-FSM). The clock of the co-processor is the internal 8 MHz oscillator.
ULP­RISC­V has the following features:
• support for RV32IMC instruction set
• thirty-two 32-bit general-purpose registers
• 32-bit multiplier and divider
• support for interrupts
• boot by the CPU, its dedicated timer, or RTC GPIO
ULP­FSM has the following features:
• support for common instructions including arithmetic, jump, and program control instructions
• support for on-board sensor measurement instructions
• boot by the CPU, its dedicated timer, or RTC GPIO
Note that these two co-processors cannot work simultaneously.
3.7 Timers and Watchdogs
3.7.1 64­bit Timers
There are four general-purpose timers embedded in ESP32-S2. They are all 64-bit generic timers which are
based on 16-bit prescalers and 64-bit auto-reload-capable up/down-timers.
The timers’ features are summarized as follows:
• a 16-bit clock prescaler, from 1 to 65536
• a 64-bit time-base counter programmable to be incrementing or decrementing
Espressif Systems
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ESP32-S2 Series Datasheet v1.4



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