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SH79F6489P/080PR Datasheet(PDF) 55 Page - SINOWEALTH Electronic Ltd |
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SH79F6489P/080PR Datasheet(HTML) 55 Page - SINOWEALTH Electronic Ltd |
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55 / 152 page  SH79F6488/SH79F6489 55 Registers Table 7.33 Timer2 Control Register C8H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 T2CON TF2 EXF2 EXEN2 TR2 C/T2 ——— CP/RL2 ———— R/W R/W R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 0 0 Bit Number Bit Mnemonic Description 7 TF2 Timer2 overflow flag bit 0: No overflow (Must be cleared by software) 1: Overflow (Set by hardware) 6 EXF2 External event input (falling edge) from T2EX pin detected flag bit 0: No external event input (Must be cleared by software) 1: Detected external event input (Set by hardware if EXEN2 = 1) 3 EXEN2 External event input (falling edge) from T2EX pin used as Reload/Capture trigger enable/disable control bit 0: Ignore events on T2EX pin 1: Cause a capture or reload when a negative edge on T2EX pin is detected, when Timer 2 is not used to clock the EUART (T2EX always has a pull up resistor) 2 TR2 Timer2 start/stop control bit 0: Stop Timer2 1: Start Timer2 1 C/T2 ——— Timer2 Timer/Counter mode selected bit 0: Timer Mode, T2 pin is used as I/O port 1: Counter Mode, the internal pull-up resister is turned on 0 CP/RL2 ———— Capture/Reload mode selected bit 0: 16-bits timer/counter with reload function 1: 16-bits timer/counter with capture function Table 7.34 Timer2 Mode Control Register C9H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 T2MOD TCLKP2 - - - - - T2OE DCEN R/W R/W - - - - - R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 - - - - - 0 0 Bit Number Bit Mnemonic Description 7 TCLKP2 Prescale control bit 0:Timer2 source is 1/12 prescale of system clock 1: Timer2 source is system clock 1 T2OE Timer2 Output Enable bit 0: Set P0.0/T2 as clock input or I/O port 1: Set P0.0/T2 as clock output (Baud-Rate generator mode) 0 DCEN Down Counter Enable bit 0: Disable Timer2 as up/down counter, Timer2 is an up counter 1: Enable Timer2 as up/down counter |
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