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STM32H745II Datasheet(PDF) 160 Page - STMicroelectronics |
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STM32H745II Datasheet(HTML) 160 Page - STMicroelectronics |
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160 / 252 page ![]() Electrical characteristics STM32H745xI/G 160/252 DS12923 Rev 1 Refer to Section 6.3.16: I/O port characteristics for more details on the input/output alternate function characteristics. Asynchronous waveforms and timings Figure 27 through Figure 29 represent asynchronous waveforms and Table 75 through Table 82 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode , DataSetupTime = 0x5) • BusTurnAroundDuration = 0x0 • Capacitive load CL = 30 pF In all timing tables, the TKERCK is the fmc_ker_ck clock period. Figure 27. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms 1. Mode 2/B, C and D only. In Mode 1, FMC_NADV is not used. Data FMC_NE FMC_NBL[1:0] FMC_D[15:0] tv(BL_NE) t h(Data_NE) FMC_NOE Address FMC_A[25:0] tv(A_NE) FMC_NWE tsu(Data_NE) tw(NE) MS32753V1 w(NOE) t tv(NOE_NE) t h(NE_NOE) th(Data_NOE) t h(A_NOE) t h(BL_NOE) tsu(Data_NOE) FMC_NADV (1) t v(NADV_NE) tw(NADV) FMC_NWAIT tsu(NWAIT_NE) th(NE_NWAIT) |
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