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TDA7720BTR Datasheet(PDF) 38 Page - STMicroelectronics |
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TDA7720BTR Datasheet(HTML) 38 Page - STMicroelectronics |
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38 / 42 page  I2C bus specification TDA7720B 38/42 DocID024331 Rev 2 -0 1 -- - - - - Clock source (2) External (MUTE Pin) Internal (200 kHz) 0 1 -- - - - - - Attenuator gain clock control (2) On Off 1. The control bit needs both I2C test mode on & sub-address test mode on. 2. The control bit does not depend on test mode. Table 20. Testing audio processor 1 (19) (continued) MSB LSB Function D7 D6 D5 D4 D3 D2 D1 D0 Table 21. Testing audio processor 2 (20) MSB LSB Function D7 D6 D5 D4 D3 D2 D1 D0 -- -- - - - 0 1 Test architecture (1) Normal Split -- -- - - 0 1 - Oscillator clock (2) 400 kHz 800 kHz -- -- - 0 1 -- Soft-step curve (2) S-Curve Linear curve -- - 0 0 1 1 0 1 0 1 -- - Manual set busy signal (1) Auto Auto 0 1 -- - 0 0 1 1 0 1 0 1 -- - Request for clk generator (1) Allow Allow Stopped Stopped -- 0 1 -- - - - No DCO spike rejection(1) On Off xx - - - - - - Not used 1. The control bit needs sub-address test mode on. 2. The control bit does not depend on test mode. |
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