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SPEAR-07-NC03 Datasheet(PDF) 39 Page - STMicroelectronics |
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SPEAR-07-NC03 Datasheet(HTML) 39 Page - STMicroelectronics |
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39 / 194 page ![]() SPEAR-07-NC03 6 Blocks description 39/194 6.2.4.2 Ethernet DMA, Interrupt Sources Enable Register Mnemonic : DMA_INT_EN Address : 0x3000_3004 Default value : 0x0000_0000 The DMA Interrupt enable register allows the various sources of interrupt to be individually enabled. All the enabled sources will then be OR-ed to generate the global DMA interrupt. Setting a bit in DMA_INT_EN allows the corresponding interrupt described in DMA_INT_STAT to influence the global DMA Interrupt. If any bit position is set to '1' in BOTH DMA_INT_STAT and DMA_INT_EN, then the DMA Interrupt will be asserted. Refer to the DMA_INT_STAT for a description of interrupt sources. Bit Field name Access 31 TX_CURR_DONE_EN RW 30 - 29 Reserved RO 28 MAC110_INT_EN RW 27 - 26 Reserved RO 25 TX_MERR_INT_EN RW 24 Reserved RO 23 TX_DONE_EN RW 22 TX_NEXT_EN RW 21 - 20 Reserved RO 19 TX_TO_EN RW 18 TX_ENTRY_EN RW 17 TX_FULL_EN RW 16 TX_EMPTY_EN RW 15 RX_CURR_DONE_EN RW 14 - 10 Reserved RO 09 RX_MERR_INT_EN RW 08 Reserved RO 07 RX_DONE_EN RW 06 RX_NEXT_EN RW 05 PACKET_LOST_EN RW 04 Reserved RO 03 RX_TO_EN RW 02 RX_ENTRY_EN RW 01 RX_FULL_EN RW 00 RX_EMPTY_EN RW |
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