FAM65V05DF1_V01 datasheet(2/16 Pages) ONSEMI

2 / 16 page

FAM65V05DF1

www.onsemi.com

PIN CONFIGURATION

Figure 1. Pin Configuration

TOP VIEW

PIN DESCRIPTION

Pin Number

Name

Description

VCC (L)

Low−side Common Bias Voltage for IC and IGBTs Driving

COM

Common Supply Ground

IN (UL)

Signal Input for Low−side U Phase

IN (VL)

Signal Input for Low−side V Phase

IN (WL)

Signal Input for Low−side W Phase

VFO

Fault Output

VTS

Output for LVIC temperature sense

CSC

Capacitor (Low−pass Filter) for Short−Current Detection Input

IN (UH)

Signal Input for High−side U Phase

VCC (H)

High−side Common Bias Voltage for IC and IGBTs Driving

VB (U)

High−side Bias Voltage for U Phase IGBT Driving

VS (U)

High−side Bias Voltage Ground for U Phase IGBT Driving

IN (VH)

Signal Input for High−side V Phase

VCC (H)

High−side Common Bias Voltage for IC and IGBTs Driving

VB (V)

High−side Bias Voltage for V Phase IGBT Driving

VS (V)

High−side Bias Voltage Ground for V Phase IGBT Driving

IN (WH)

Signal Input for High−side W Phase

VCC (H)

High−side Common Bias Voltage for IC and IGBTs Driving

VB (W)

High−side Bias Voltage for W Phase IGBT Driving

VS (W)

High−side Bias Voltage Ground for W Phase IGBT Driving

Negative DC–Link Input for U Phase

Negative DC–Link Input for V Phase

FAM65V05DF1 Datasheet(PDF) 2 Page - ON Semiconductor

FAM65V05DF1 Datasheet(HTML) 2 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL