8-49
Military QuickRAM
Rev A
Pin Descriptions
Ordering Information
PIN DESCRIPTIONS
Pin
Function
Description
TDI/RSI
Test Data In for JTAG /
RAM init. Serial Data In
Hold HIGH during normal operation. Connects to serial
PROM data in for RAM initialization. Connect to VCC if
unused.
TRSTB/RRO
Active low Reset for JTAG /
RAM init. reset out
Hold LOW during normal operation. Connects to serial
PROM reset for RAM initialization. Connect to GND if
unused.
TMS
Test Mode Select for JTAG
Hold HIGH during normal operation. Connect to VCC if
not used for JTAG.
TCK
Test Clock for JTAG
Hold HIGH or LOW during normal operation. Connect to
VCC or ground if not used for JTAG.
TDO/RCO
Test data out for JTAG /
RAM init. clock out
Connect to serial PROM clock for RAM initialization. Must
be left unconnected if not used for JTAG or RAM
initialization.
STM
Special Test Mode
Must be grounded during normal operation.
I/ACLK
High-drive input and/or
array network driver
Can be configured as either or both.
I/GCLK
High-drive input and/or
global network driver
Can be configured as either or both.
I
High-drive input
Use for input signals with high fanout.
I/O
Input/Output pin
Can be configured as an input and/or output.
VCC
Power supply pin
Connect to 3.3V supply.
VCCIO
Input voltage tolerance pin
Connect to 5.0 volt supply if 5 volt input tolerance is
required, otherwise connect to 3.3V supply.
GND
Ground pin
Connect to ground.
GND/THERM
Ground/Thermal pin
Available on 456-PBGA only. Connect to ground plane on
PCB if heat sinking desired. Otherwise may be left
unconnected.
QL 4090 - 1 PQ208 M
Operating Range
M = Military
M/883 = MIL STD 883
Package Code
PL84 = 84-pin PLCC
CG84=84-pin CPGA
CF100 = 100-pin CQFP
CG144=144-pin CPGA
PQ208 = 208-pin PQFP
CF208 = 208-pin CQFP
PQ240 = 240-pin PQFP
CG256=256-pin CPGA
CG456=456-pin PBGA
QuickLogic
device
QuickRAM device
part number
4016
4036
4090
Speed Grade
0 = quick
1 = fast
2 = faster
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