M95640-R datasheet(34/53 Pages) STMICROELECTRONICS

34 / 53 page

DC and AC parameters

M95640-W M95640-R M95640-DF

34/53

DocID16877 Rev 19

Table 12. Cycling performance by groups of four bytes

Symbol

Parameter(1)

1. Cycling performance for products identified by process letter K (previous products were specified with 1

million cycles at 25 °C)

Test conditions

Min.

Max.

Unit

Ncycle

Write cycle endurance(2)

2. The Write cycle endurance is defined for groups of four data bytes located at addresses [4*N, 4*N+1,

4*N+2, 4*N+3] where N is an integer. The Write cycle endurance is defined by characterization and

qualification.

TA ≤ 25 °C,

VCC(min) < VCC < VCC(max)

4,000,000

Write cycle(3)

3. A Write cycle is executed when either a Page Write, a Byte Write, a WRSR, a WRID or an LID instruction is

decoded. When using the Byte Write, the Page Write or the WRID instruction, refer also to Section 6.6.1:

Cycling with Error Correction Code (ECC).

TA = 85 °C,

VCC(min) < VCC < VCC(max)

1,200,000

Table 13. Memory cell data retention

Parameter

Test conditions

Min.

Unit

Data retention(1)(2)

1. The data retention behavior is checked in production, while the 200-year limit is defined from

characterization and qualification results.

2. For products identified by process letter K (previous products were specified with a data retention of 40

years at 55°C).

TA = 55 °C

200

Year

Table 14. Capacitance

Symbol

Parameter

Test conditions(1)

1. Sampled only, not 100% tested, at TA = 25 °C and a frequency of 5 MHz.

Min.

Max.

Unit

COUT

Output capacitance (Q)

VOUT = 0 V

CIN

Input capacitance (D)

VIN = 0 V

Input capacitance (other pins)

VIN = 0 V

M95640-R Datasheet(PDF) 34 Page - STMicroelectronics

M95640-R Datasheet(HTML) 34 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

Datasheet Download

Link URL