LX7730LMMF datasheet(21/54 Pages) MICROSEMI

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Bi-level Discrete Monitors (BDM)

June 2020

LX7730 rev 2.4

The input protection clamps at each BLI input operate between the input and GND. The small (<1.5µA) leakage current

drawn by a clamp provides a weak pulldown to each input, so an open BLI input will produce a corresponding low BLO

output, presuming no noise coupling or other EMI effects at the input.

Figure 5. BLI-BLO Bi-Level Comparators Block Diagram

14.3 Bank Bi-Level Comparators

The 8 bank bi-level comparator non-inverting inputs share a common trip threshold set in the range 0 to 5V. This is set by

an 8-bit DAC controlled by the 8-Bit Bank Bi-Level Comparators Threshold DAC register (Table 26 on page 42). The bank

bi-level comparator outputs are available in the Bank Bi-Level Comparators Output Status register 13 (Table 29 on page

44). The bank bi-level comparators are sampled during the clock cycle that register 13 is read.

The bank bi-level comparator non-inverting inputs connect to 8 of the 64 analog inputs CH1 to CH64, which are also the

inputs to the analog signal monitor (section 15 on page 24). The multiplexers for CH1 to CH64 are controlled by either the

bank bi-level comparator circuitry or by the analog signal monitor. Either way, the bank bi-level comparators always

receive 8 different inputs from CH1 to CH64.

14.3.1 BANK BI-LEVEL COMPARATORS CONTROL THE BANK INPUT MULTIPLEXERS

The Bank Bi-Level Comparators Input Selection register 12 (Table 28 on page 44) selects which bank of 8 inputs are

routed to the non-inverting inputs of the bank bi-level comparators, when register 12's En Sw bit D3 = 1. The register

selects one of eight groups of consecutive inputs to be routed to the comparators. The groups are CH1 to CH8, CH9 -

CH16, CH17 - CH24, CH25 - CH32, CH33 - CH40, CH41 - CH48, CH49 - CH56, and CH57 - CH64.

Figure 6 on page 22 shows a block diagram of bank bi-level comparators operating with register 12's En Sw bit D3 = 1.

Here, the 8 bank multiplexers are controlled by a common 3-bit selection input.

The analog signal monitor can acquire single ended or differential signals from any combination of the eight inputs pre-

selected by the setting in register 12.

LX7730LMMF Datasheet(PDF) 21 Page - Microsemi Corporation