PCF21XXC_FAM

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© NXP Semiconductors N.V. 2015. All rights reserved.

Product data sheet

Rev. 3 — 6 May 2015

11 of 25

NXP Semiconductors

PCF21xxC family

LCD drivers

11. Dynamic characteristics

Table 7.

Dynamic characteristics

VDD = 2.25 V to 6.0 V; VSS =0V; Tamb = 40 C to +80 C; RO =1M; CO = 680 pF; all timing values are referenced to VIH

and VIL levels with an input voltage swing of VSS to VDD; unless otherwise specified.

Symbols

Parameter

Conditions

Min

Typ

Max

Unit

Inputs CLB, DATA and DLEN; see Figure 12

tSUDA

data setup time

3

-

-

s

tHDDA

data hold time

3

-

-

s

tSUEN

enable setup time

1

-

-

s

tSUDI

disable setup time

2

-

-

s

tSULD

load pulse setup time

2.5

-

-

s

tBUSY

busy time

3

-

-

s

tWH

CLB HIGH time

1

-

-

s

tWL

CLB LOW time

5

-

-

s

tCLB

CLB cycle time

10

-

-

s

tr

rise time

-

-

10

s

tf

fall time

-

-

10

s

LCD timing; see Figure 12 to Figure 17

fLCD

PCF2100C, PCF2111C

60

75

100

Hz

PCF2112C; CO = 1.5 nF

30

35

50

Hz

tBS

transfer time

with test loads; VDD = 5 V

-

20

100

s

tPLCD

driver delay time

with test loads; VDD = 5 V

-

20

100

s