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L9969X Datasheet(PDF) 43 Page - STMicroelectronics

Part # L9969X
Description  Automotive chip for single and dual H-bridge
PDF  70 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9969X Datasheet(HTML) 43 Page - STMicroelectronics

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Invalid instruction/access: an instruction is invalid, if one of the following conditions is fulfilled: a) an
unused instruction code is detected (see Table 26), b) in case the previous transmission is not completed in
terms of internal data processing (violation of the minimum access-time).
If an invalid instruction is detected, no modifications of the registers of the H-bridge are allowed.
In case an unused instruction code has occurred, the data byte “FFhex” will be transmitted after having sent
the check byte. In order to guarantee the proper operation of the corresponding circuitry the active NSS
signal must be stable for at least 50ns. In addition any access is invalid if the number of SPI clock pulses
(falling edge) counted during active NSS differs from exactly 16 clock pulses.
A write access will be internally rejected (that is internal registers will not be affected) in case the number of
falling edges applied to the SPI input SCK during the access is not equal to 16.
3.2.7.4
SPI Instruction
The uppermost 2 bits of the instruction byte are reserved to feature extended chip addressing.
The individual chip address is an option and has to be defined in accordance to the SPI-Members sharing one
NSS line.
Only when the first two bits after the falling edge of NSS are matching, the H-bridge is allowed to transfer data on
SO.
Table 26. SPI Instruction byte
MSB
7
6
5
4
3
2
1
0
CPAD1
CPAD0
INST5
INST4
INST3
INST2
INST1
INST0
Bit
Name
Description
7
CPAD1 (INST7)
Chip Address: Mask-Option
Value: 0 (via pad configuration)
6
CPAD0 (INST6)
Chip Address: Mask-Option
Value: 0 (via pad configuration)
5…0
INST5
Read/Write:
Read: 0 Write: 1
4…0
INST4…0
SPI instruction
3.2.7.5
Check byte
Table 27. Check byte
MSB
7
6
5
4
3
2
1
0
Tristate Tristate
1
0
1
0
1
TRANS_F
Bit
Name
Description
7
-
Tri state ( high impedance )
6
-
Tri state ( high impedance )
5
-
Fixed to High
4
-
Fixed to Low
3
-
Fixed to High
2
-
Fixed to Low
1
-
Fixed to High
0
TRANS_F Transfer-Failure: (reset value ‘0’)
L9969x
Functional behavior in detail
DS14029 - Rev 3
page 43/70



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