DA7280-00FVC datasheet(21/85 Pages) RENESAS

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DA7280

LRA/ERM Haptic Driver with Multiple Input

Triggers, Integrated Waveform Memory and

Wideband Support

Datasheet

Revision 3.2

02-Mar-2022

CFR0011-120-00

21 of 84

Operating Mode

Description

OPERATION_MODE

Pulse width modulated

(PWM)

Playback streaming from PWM data input source on

pin GPI_0/PWM

memory (RTWM)

Playback from Waveform Memory triggered only by

I2C write to SEQ_START

Edge triggered waveform

memory (ETWM)

Playback from Waveform Memory triggered by

rising/falling edge on any of three GPIs or via I2C

write to SEQ_START

5.2.3

Inactive Mode

DA7280 can be configured to automatically return to IDLE state (for lower IQ) or STANDBY state (for

minimized latency) after completion of playback, see Section 5.2.1. In both states the register

contents are retained. DA7280 remains in Inactive mode until it receives a playback request via

either the GPI pins or I2C (providing any faults in the fault registers have been cleared, see

Section 5.6.6).

In the event of a fault the system will automatically return to the IDLE state, see Section 5.6.6.

5.2.4

Direct Register Override Mode

In DRO mode haptic sequences are streamed to DA7280 via I2C input. The drive level of the output

is set via OVERRIDE_VAL. For optimal start-up timing, update OVERRIDE_VAL before setting

OPERATION_MODE = 1. OVERRIDE_VAL is treated as a two's complement proportional value

where:

If ACCELERATION_EN = 1, the output drive level is equal to the value in OVERRIDE_VAL multiplied

by the voltage stored in ACTUATOR_NOMMAX. OVERRIDE_VAL is interpreted as a proportion

between 0 % (0x00) and 100 % (0x7F). The range from 0xFF to 0x80 is not used, see Figure 30. If

enabled, the automatic Active Acceleration and Rapid Stop features will take the output up to the

voltage in ACTUATOR_ABSMAX and/or reverse the drive level to be negative during level

transitions, but in steady state the value will always scale to the voltage in ACTUATOR_NOMMAX.

If ACCELERATION_EN = 0, the output drive level is equal to the value in OVERRIDE_VAL multiplied

by the voltage stored in ACTUATOR_ABSMAX. In this case OVERRIDE_VAL is interpreted as a

proportion between -100% (0x80) and 100% (0x7F), see Figure 31. When DA7280 is set up to drive

an ERM, the negative value represents a change in drive voltage polarity, while for an LRA it

represents a phase shift of 180° in the drive signal. Negative drive can be used to speed up output

acceleration level changes without the use of the Active Acceleration and Rapid Stop. Note that in

the ACCELERATION_EN = 0 case Rapid Stop can still be enabled if an automatic stop to zero

actuator acceleration is required.

Note: The output amplitude updates at twice the LRA frequency (when the differential voltage across

the LRA crosses zero), therefore input changes more frequent than this are not required as sampling

occurs only around a zero cross. Since the I2C is asynchronous to the output drive, updates to

OVERRIDE_VAL will have a one LRA half-period of uncertainty before propagating to the output.

Synchronization of OVERRIDE_VAL updates to the half period is possible via software by looking at

the POLARITY register and updating the output drive level, see Section 5.7.8.

When driving a wideband LRA in DRO mode, resonant frequency tracking can be turned off. This

enables wideband operation and two-dimensional effects using DMAs, see Sections 5.7.5 and 5.7.6.

During playback, if a value written to OVERRIDE_VAL results in the output driving strength being

maintained at 0 %, DA7280 will disable its output stage to save power. Drive is re-enabled

automatically, with one LRA half-period delay, when a non-zero OVERRIDE_VAL value I2C input is

received.

DA7280-00FVC Datasheet(PDF) 21 Page - Renesas Technology Corp

DA7280-00FVC Datasheet(HTML) 21 Page - Renesas Technology Corp

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