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ADM1062ASU Datasheet(PDF) 19 Page - Analog Devices |
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ADM1062ASU Datasheet(HTML) 19 Page - Analog Devices |
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19 / 32 page ![]() Preliminary Technical Data ADM1062 Rev. PrJ | Page 19 of 32 ADM1062 SEQUENCING ENGINE The ADM1062 incorporates a Sequencing Engine (SE) which provides the user with powerful and flexible control of sequencing. The SE implements a state machine control of the PDO outputs, with state changes conditional on input events. SE programs can enable complex control of boards, such as powerup and power down sequence control, fault event handling, interrupt generation on warnings etc. A watchdog function, to verify the continued operation of a processor clock, can be integrated into the SE program. The SE can also be controlled via the SMBus, giving software or firmware control of the board sequencing Considering the function of the SE from an applications viewpoint it is most instructive to think of the SE as providing a “state” for a state machine. This state has the following attributes: • it is used to monitor signals indicating the status of the 10 input pins, VP1-4, VH and VX1-VX5 • it can be entered from any other state • there are three exit routes which move the state machine on to a “next state”, these are: 1. End of Step detection 2. Monitoring fault 3. Timeout • delay timers for the End of Step and Timeout blocks above can be programmed independently and will change with each state change. The range of timeouts is from 0ms to 400ms • the output condition of the 10 PDO pins is defined and fixed within a state • the transition from one state to the next is made in less than 20µs. This is the time taken to download a state definition from EEPROM to the SE. Figure 27. State Cell The ADM1062 offers up to 63 such state definitions. The signals being monitored to indicate the status of the input pins are the outputs of the SFD’s. WARNINGS The SE is also monitoring the Warnings. These are generated by ADC readings violating their limit register value or by the secondary voltage monitors on VP1-4, VH. These are all OR’ed together and available as a single “Warnings” input to each of the three blocks which enable exiting from a state. SW FLOW-UNCONDITIONAL JUMP The SE can be forced to advance to the next state unconditionally. This enables the user to force the SE to advance. Examples where this might be used include moving to a margining state or as a method of debugging a sequence. The SW Flow or Go to command can be seen as another input to End of Step and Timeout blocks which provide an exit from each state. Table 6. Example Sequence States Entries State End of Step Timeout Monitor IDLE1 If VX1 is LOW then go to State IDLE2 IDLE2 If VP1 is OK then go to State EN3V3 EN3V3 If VP2 is OK then go to State EN2V5 If VP2 is NOT OK after 10ms then goto State DIS3V3 If VP1 is NOT OK then goto State IDLE1 DIS3V3 If VX1 is HIGH then go to State IDLE1 EN2V5 If VP3 is OK then go to State PWRGD If VP3 is NOT OK after 20ms then goto State DIS2V5 If VP1 OR VP2 is NOT OK then goto State FSEL2 DIS2V5 If VX1 is HIGH the go to State IDLE1 FSEL1 If VP3 is NOT OK then go to State DIS2V5 If VP1 OR VP2 is NOT OK then goto State FSEL2 FSEL2 If VP2 is NOT OK then go to State DIS3V3 If VP1 is NOT OK then goto State IDLE1 PWRGD If VX1 is HIGH then go to State DIS2V5 If VP1 OR VP2 OR VP3 is NOT OK then goto State FSEL1 |
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