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ISL8200MMREP Datasheet(PDF) 15 Page - Renesas Technology Corp

Part # ISL8200MMREP
Description  Complete Current Share 10A DC/DC Power Module
PDF  24 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL8200MMREP Datasheet(HTML) 15 Page - Renesas Technology Corp

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ISL8200MM
FN7690 Rev 2.00
Page 15 of 24
Mar 15, 2013
Fault Handshake
In a multi-module system, with the EN pins wired OR’ed together,
all modules can immediately turn off, at one time, when a fault
condition occurs in one or more modules. A fault would pull the
EN pin low, disabling all the modules and would not create
current bounce. Thus, no single channel would be over stressed
when a fault occurs.
Since the EN pins are pulled down under fault conditions, the
pull-up resistor (RUP) should be scaled to sink no more than 5mA
current from EN pin. Essentially, the EN pins cannot be directly
connected to VCC.
Soft-Start
The ISL8200MMREP has an internal digital pre-charged
soft-start circuitry, which has a rise time inversely proportional to
the switching frequency and is determined by a digital counter
that increments with every pulse of the phase clock. The full
soft-start time from 0V to 0.6V can be estimated by Equation 5.
tSS
2560
fSW
-------------
=
(EQ. 5)
VOUT TARGET VOLTAGE
0.0V
tSS
2560
fSW
-------------
=
FIRST PWM PULSE
-100mV
tSS_DLY
384
FSW
------------
FIGURE 22. SOFT-START WITH VOUT = 0V
SS Settling at VREF + 100mV
INIT. VOUT
VOUT TARGET VOLTAGE
FIRST PWM PULSE
-100mV
SS Settling at VREF + 100mV
FIGURE 23. SOFT-START WITH VOUT < TARGET VOLTAGE
OV = 113%
VOUT TARGET VOLTAGE
FIRST PWM PULSE
FIGURE 24. SOFT-START WITH VOUT BELOW OV BUT ABOVE FINAL
TARGET VOLTAGE
FIGURE 25. SIMPLIFIED ENABLE AND VOLTAGE FEED-FORWARD CIRCUIT
0.8V
IEN_HYS = 30μA
RUP
RDOWN
SOFT-START
RDOWN
RUP V
·
EN_REF
VEN_FTH VEN_REF
–
---------------------------------------------------------------
=
VEN_FTH VEN_RTH VEN_HYS
–
=
VIN
GRAMP = 1.25
LIMITER
SAWTOOTH
AMPLITUDE
V
D RAMP
LIMIT(VCC_FF GRAMP, VCC - 1.4V - VRAMP_OFFSET
´
=
(DVRAMP)
EN
OV, OT, OC, AND PLL LOCKING FAULTS
RUP
VEN_HYS
IEN_HYS
-----------------------------
=
SYSTEM DELAY
VCC_FF
0.8V
å
VRAMP_OFFSET = 1.0V
VCC - 1.4V
LOWER LIMIT
UPPER LIMIT
(RAMP OFFSET)
384 CLOCK
CYCLES
FF



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