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ISL8200MMREP Datasheet(PDF) 17 Page - Renesas Technology Corp |
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ISL8200MMREP Datasheet(HTML) 17 Page - Renesas Technology Corp |
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17 / 24 page ![]() ISL8200MM FN7690 Rev 2.00 Page 17 of 24 Mar 15, 2013 Multi-module operation can be achieved by connecting the ISHARE pin of two or more modules together. In multi-module operation the voltage on the ISHARE pin correlates to the average current of all the active channels. The output current of each module in multi-module operation is compared to a precise 1.2V threshold to determine the overcurrent condition. Additionally, each module has an overcurrent trip point of 108μA with 7-cycle delay. This scheme helps protect from damaging a module(s) in multi-module mode by not having a single module carrying more than 108μA. Note that it is not necessary for the RISHARE to be scaled to trip at the same level as the 108μA OCP comparator. Typically the ISHARE pin average current protection level should be higher than the phase current protection level. For instance, when Channel 1 operates independently, the OC trip set by 1.2V comparator can be lower than 108μA trip point as shown in Equation 6. where NCNTL is the number of the ISL8200MMREP modules in parallel or multi-module operations; ITRIP = 108μA; IOC is the load overcurrent trip point; TMIN_OFF is the minimum UGATE turn off time that is 350ns; RISHARE in Equation 7 represents the total equivalent resistance in ISHARE pin bus of all ICs in multiphase or module parallel operation. ISL8200MMREP has a low-side FET with typical rDS(ON) of 9mΩ (VGS = 10V, IDS = 30A). Note: ISL8200MMREP has integrated 2.2kΩ resistance (RSEN-IN). Therefore, the equivalent resistance of RSEN is: The OC trip point varies in a system mainly due to the MOSFET rDS(ON) variations (overprocess, current and temperature). To avoid overcurrent tripping in the normal operating load range, find the RSEN resistor from Equation 8 of IPEAK with: 1. The maximum rDS(ON) at the highest junction temperature 2. The minimum ISOURCE from the “Electrical Specifications” table on page 8. 3. Determine IOC for: where IL is the output inductor ripple current. The relationships between the external RSEN-EX values and the typical output current IOUT(MAX) OCP levels for ISL8200MMREP are shown in Table 2: In a high input voltage, high output voltage application, such as 20V input to 5V output, the inductor ripple becomes excessive due to the fix internal inductor value. In such application, the output current will be limited from the rating to approximately 70% of the module’s rated current. When OCP is triggered, the controller pulls EN low immediately to turn off UGATE and LGATE. For overload and hard short condition, the overcurrent protection reduces the regulator RMS output current much less than full load by putting the controller into hiccup mode. A delay time, equal to 3 soft-start intervals, is entered to allow the disturbance to be cleared out. After the delay time, the controller then initiates a soft-start interval. If the output voltage comes up and returns to the regulation, PGOOD transitions high. If the OC trip is exceeded during the soft-start interval, the controller pulls EN low again. The PGOOD signal will remain low and the soft-start interval will be allowed to expire. Another soft-start interval will be initiated after the delay interval. If an overcurrent trip occurs again, this same cycle repeats until the fault is removed. Oscillator The Oscillator is a sawtooth waveform, providing for leading edge modulation with 350ns minimum dead time. The oscillator (Sawtooth) waveform has a DC offset of 1.0V. Each channel’s peak-to-peak of the ramp amplitude is set proportionally to the voltage applied to its corresponding FF pin. Frequency Synchronization and Phase Lock Loop The FSYNC_IN pin has two primary capabilities: fixed frequency operation and synchronized frequency operation. By tying a resistor (RFS) to PGND1 from the FSYNC_IN pin, the switching frequency can be set at any frequency between 700kHz and 1.5MHz. The ISL8200MMREP has an integrated 59kΩ resistor between FSYNC_IN and PGND1, which sets the default frequency to 700kHz. The frequency setting curve shown in Figure 27 is provided to assist in selecting an externally connected resistor RFS-ext between FSYNC_IN and PGND1 to increase the switching frequency. RISEN1 IOC VOUT L ---------------- 1D – 2FSW ---------------- TMIN_OFF – + RDS ITRIP ------------------------------------------------------------------------------------------------------------------------ = RISHARE 1.2V ITRIP --------------- = RISET RISHARE NCNTL = (EQ. 6) RSEN RSEN-EX RSEN-IN RSEN-EX RSEN-IN + -------------------------------------------------------- = (EQ. 7) IOC IOUT MAX IL 2 ------------- + (EQ. 8) TABLE 2. RSEN-EX OCP (A) @ VIN = 12V OPEN 17 50kΩ 15.5 20kΩ 14.5 10kΩ 14 5kΩ 12.5 3kΩ 11 2kΩ 8 |
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