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ICS9LPRS535 Datasheet(PDF) 9 Page - Renesas Technology Corp |
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ICS9LPRS535 Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 18 page ![]() 9 Integrated Circuit Systems, Inc. ICS9LPRS535 Datasheet 1461A—07/28/09 PCI_STOP# Power Management SMBus OE Bit PCI_STOP# Stoppable Free running Stoppable Free running 1 Running Running Running Running 0 Low Running CK= High CK# = Low Running Disable X CPU_STOP# Power Management SMBus OE Bit Stoppable Free running 1 Running Running 0 CK= High CK# = Low Running Disable X CR# Power Management SMBus OE Bit CR# CR# controlled Free running 1 Running Running 0 Disable X PD# Power Management Device State w/o Latched input w/Latched input Latches Open Low Power Down 25MHz M1 25MHz Virtual Power Cycle to Latches Open 25MHz SE1 w/B11b5 = 1 Differential Clocks (Except CPU1) Single-ended Clocks Differential Clocks (Except CPU) Low CK = Pull down, CK# = Low CPU Clocks Differential Clocks (Except CPU) Enable CK= Pull down, CK# = Low Low CPU_STOP# Enable Enable CK= Pull down, CK# = Low CK= Pull down, CK# = Low Low Hi-Z Single-ended Clocks (Except SE1) CK= Pull down CK# = Low CK= Pull down CK# = Low Low SE1 w/B11b5 = 0 CPU1 CK= Pull down, CK# = Low CK= Pull down, CK# = Low CK= Pull down, CK# = Low Running CK= Pull down CK# = Low |
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