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STM32H7 Datasheet(PDF) 308 Page - STMicroelectronics |
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STM32H7 Datasheet(HTML) 308 Page - STMicroelectronics |
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308 / 357 page ![]() Electrical characteristics (rev V) STM32H742xI/G STM32H743xI/G 308/357 DS12110 Rev 10 Figure 106. I2S slave timing diagram (Philips protocol)(1) 1. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. Table 206. I2S dynamic characteristics(1) 1. Guaranteed by characterization results. Symbol Parameter Conditions Min Max Unit fMCK I2S main clock output - 256x8K 256FS MHz fCK I2S clock frequency Master data - 64FS MHz Slave data - 64FS tv(WS) WS valid time Master mode - 3 ns th(WS) WS hold time Master mode 0 - tsu(WS) WS setup time Slave mode 1 - th(WS) WS hold time Slave mode 1 - tsu(SD_MR) Data input setup time Master receiver 1 - tsu(SD_SR) Slave receiver 1 - th(SD_MR) Data input hold time Master receiver 4 - th(SD_SR) Slave receiver 2 - tv(SD_ST) Data output valid time Slave transmitter (after enable edge) -17 tv(SD_MT) Master transmitter (after enable edge) -3 th(SD_ST) Data output hold time Slave transmitter (after enable edge) 9- th(SD_MT) Master transmitter (after enable edge) 0- |
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