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STM32H7 Datasheet(PDF) 304 Page - STMicroelectronics |
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STM32H7 Datasheet(HTML) 304 Page - STMicroelectronics |
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304 / 357 page ![]() Electrical characteristics (rev V) STM32H742xI/G STM32H743xI/G 304/357 DS12110 Rev 10 Figure 102. USART timing diagram in Slave mode SPI interface characteristics Unless otherwise specified, the parameters given in Table 205 for SPI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 122: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load CL = 30 pF • Measurement points are done at CMOS levels: 0.5VDD • IO Compensation cell activated. • HSLV activated when VDD ≤ 2.7 V • VOS level set to VOS1 Refer to Section 7.3.15: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI). MSv65387V1 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 TX output RX input tsu(RX) th(RX) tw(SCKL) tw(SCKH) tc(SCK) tr(SCK) th(NSS) tdis(TX) tsu(NSS) ta(TX) tv(TX) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(TX) tf(SCK) Last bit IN |
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